From ad3ce248b6afcc6d255e6ea08f67ddc0b7f76600 Mon Sep 17 00:00:00 2001 From: Amirhossein Akhlaghpour Date: Sun, 26 Jul 2026 21:29:02 +0330 Subject: [PATCH 1/2] test: add regression test for bool indexing codegen Signed-off-by: Amirhossein Akhlaghpour --- ...ng-with-bools-no-redundant-instructions.rs | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs diff --git a/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs b/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs new file mode 100644 index 0000000000000..628f4faab6d06 --- /dev/null +++ b/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs @@ -0,0 +1,35 @@ +//@ assembly-output: emit-asm +//@ only-x86_64 +//@ ignore-sgx Test incompatible with LVI mitigations +//@ compile-flags: -Copt-level=3 + +//! Regression test for https://github.com/rust-lang/rust/issues/123216. +//! Indexing with a `bool` should not generate redundant `jmp` or `and` +//! instructions. + +#![crate_type = "lib"] + +#[no_mangle] +pub fn bool_index(a: u32, b: bool, c: bool, d: &mut [u128; 2]) { + // CHECK-LABEL: bool_index: + // CHECK: testl %esi, %esi + // CHECK: je + // CHECK: xorb %dl, %dil + // CHECK: orb $1, (%rcx) + // CHECK-NOT: jmp + // CHECK-NOT: andb $1, %dil + // CHECK: movzbl %dil, %eax + // CHECK: andl $1, %eax + // CHECK: shll $4, %eax + // CHECK: orb $1, (%rcx,%rax) + // CHECK: retq + + let mut a = a & 1 != 0; + + if b { + a ^= c; + d[0] |= 1; + } + + d[a as usize] |= 1; +} From ad2ca88d8df5d9ba52182c70b29ea1c2ac22476d Mon Sep 17 00:00:00 2001 From: Amirhossein Akhlaghpour Date: Sun, 2 Aug 2026 20:34:25 +0330 Subject: [PATCH 2/2] fix: restrict bool indexing assembly test from Windows Signed-off-by: Amirhossein Akhlaghpour --- .../indexing-with-bools-no-redundant-instructions.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs b/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs index 628f4faab6d06..7397f2ec673b0 100644 --- a/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs +++ b/tests/assembly-llvm/indexing-with-bools-no-redundant-instructions.rs @@ -1,5 +1,6 @@ //@ assembly-output: emit-asm //@ only-x86_64 +//@ ignore-windows CHECK patterns use the SysV x86-64 calling convention //@ ignore-sgx Test incompatible with LVI mitigations //@ compile-flags: -Copt-level=3