Skip to content

Commit 5dceb7a

Browse files
authored
Merge pull request #1963 from valadaptive/relaxed-minmax-docs
Correct the docs for WASM relaxed_simd's `relaxed_min`/`relaxed_max` operations
2 parents 55dae77 + 8f9458e commit 5dceb7a

File tree

1 file changed

+16
-8
lines changed

1 file changed

+16
-8
lines changed

crates/core_arch/src/wasm32/relaxed_simd.rs

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -248,8 +248,10 @@ pub fn i64x2_relaxed_laneselect(a: v128, b: v128, m: v128) -> v128 {
248248
#[stable(feature = "stdarch_wasm_relaxed_simd", since = "1.82.0")]
249249
pub use i64x2_relaxed_laneselect as u64x2_relaxed_laneselect;
250250

251-
/// A relaxed version of `f32x4_min` which is either `f32x4_min` or
252-
/// `f32x4_pmin`.
251+
/// A relaxed version of `f32x4_min` which has implementation-specific behavior
252+
/// when its operands are NaN or signed zeroes. For more information, see [the
253+
/// WebAssembly
254+
/// specification](https://webassembly.github.io/spec/core/exec/numerics.html#op-frelaxed-min).
253255
#[inline]
254256
#[cfg_attr(test, assert_instr(f32x4.relaxed_min))]
255257
#[target_feature(enable = "relaxed-simd")]
@@ -259,8 +261,10 @@ pub fn f32x4_relaxed_min(a: v128, b: v128) -> v128 {
259261
unsafe { llvm_f32x4_relaxed_min(a.as_f32x4(), b.as_f32x4()).v128() }
260262
}
261263

262-
/// A relaxed version of `f32x4_max` which is either `f32x4_max` or
263-
/// `f32x4_pmax`.
264+
/// A relaxed version of `f32x4_max` which has implementation-specific behavior
265+
/// when its operands are NaN or signed zeroes. For more information, see [the
266+
/// WebAssembly
267+
/// specification](https://webassembly.github.io/spec/core/exec/numerics.html#op-frelaxed-max).
264268
#[inline]
265269
#[cfg_attr(test, assert_instr(f32x4.relaxed_max))]
266270
#[target_feature(enable = "relaxed-simd")]
@@ -270,8 +274,10 @@ pub fn f32x4_relaxed_max(a: v128, b: v128) -> v128 {
270274
unsafe { llvm_f32x4_relaxed_max(a.as_f32x4(), b.as_f32x4()).v128() }
271275
}
272276

273-
/// A relaxed version of `f64x2_min` which is either `f64x2_min` or
274-
/// `f64x2_pmin`.
277+
/// A relaxed version of `f64x2_min` which has implementation-specific behavior
278+
/// when its operands are NaN or signed zeroes. For more information, see [the
279+
/// WebAssembly
280+
/// specification](https://webassembly.github.io/spec/core/exec/numerics.html#op-frelaxed-min).
275281
#[inline]
276282
#[cfg_attr(test, assert_instr(f64x2.relaxed_min))]
277283
#[target_feature(enable = "relaxed-simd")]
@@ -281,8 +287,10 @@ pub fn f64x2_relaxed_min(a: v128, b: v128) -> v128 {
281287
unsafe { llvm_f64x2_relaxed_min(a.as_f64x2(), b.as_f64x2()).v128() }
282288
}
283289

284-
/// A relaxed version of `f64x2_max` which is either `f64x2_max` or
285-
/// `f64x2_pmax`.
290+
/// A relaxed version of `f64x2_max` which has implementation-specific behavior
291+
/// when its operands are NaN or signed zeroes. For more information, see [the
292+
/// WebAssembly
293+
/// specification](https://webassembly.github.io/spec/core/exec/numerics.html#op-frelaxed-max).
286294
#[inline]
287295
#[cfg_attr(test, assert_instr(f64x2.relaxed_max))]
288296
#[target_feature(enable = "relaxed-simd")]

0 commit comments

Comments
 (0)