uefi-raw: Add binding for EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL

Author: seijikun

uefi-raw/CHANGELOG.md

@@ -19,6 +19,7 @@
 - Added `Usb2HostControllerProtocol`.
 - Added  `DevicePathProtocol::length()` properly constructing the `u16` value
 - Added `AllocateType`.
+- Added `PciRootBridgeIoProtocol`.
 
 ## Changed
 - `DevicePathProtocol` now derives

uefi-raw/src/protocol/mod.rs

@@ -21,6 +21,7 @@ pub mod memory_protection;
 pub mod misc;
 pub mod network;
 pub mod nvme;
+pub mod pci;
 pub mod rng;
 pub mod scsi;
 pub mod shell_params;

uefi-raw/src/protocol/pci/mod.rs

@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+
+pub mod root_bridge;

uefi-raw/src/protocol/pci/root_bridge.rs

@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+
+use crate::table::boot::{AllocateType, MemoryType};
+use crate::{Handle, PhysicalAddress, Status};
+use core::ffi::c_void;
+use core::fmt;
+use uguid::{guid, Guid};
+
+/// Corresponds to the `EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH` enum.
+#[repr(u32)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum PciRootBridgeIoProtocolWidth {
+    Uint8 = 0,
+    Uint16 = 1,
+    Uint32 = 2,
+    Uint64 = 3,
+    FifoUint8 = 4,
+    FifoUint16 = 5,
+    FifoUint32 = 6,
+    FifoUint64 = 7,
+    FillUint8 = 8,
+    FillUint16 = 9,
+    FillUint32 = 10,
+    FillUint64 = 11,
+    Maximum = 12,
+}
+
+/// Corresponds to the `EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION` enum.
+#[repr(u32)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum PciRootBridgeIoProtocolOperation {
+    BusMasterRead = 0,
+    BusMasterWrite = 1,
+    BusMasterCommonBuffer = 2,
+    BusMasterRead64 = 3,
+    BusMasterWrite64 = 4,
+    BusMasterCommonBuffer64 = 5,
+    Maximum = 6,
+}
+
+#[repr(transparent)]
+#[derive(Clone, Copy, PartialEq, Eq)]
+pub struct PciIoAddress(u64);
+
+impl PciIoAddress {
+    pub fn with_register(bus: u8, dev: u8, func: u8, reg: u8) -> Self {
+        let address =
+            ((bus as u64) << 24) | ((dev as u64) << 16) | ((func as u64) << 8) | (reg as u64);
+        Self(address)
+    }
+    pub fn with_extended_register(bus: u8, dev: u8, func: u8, ext_reg: u32) -> Self {
+        let address = ((ext_reg as u64) << 32)
+            | ((bus as u64) << 24)
+            | ((dev as u64) << 16)
+            | ((func as u64) << 8);
+        Self(address)
+    }
+    pub fn ext_reg(&self) -> u32 {
+        (self.0 >> 32) as u32
+    }
+    pub fn bus(&self) -> u8 {
+        (self.0 >> 24) as u8
+    }
+    pub fn dev(&self) -> u8 {
+        (self.0 >> 16) as u8
+    }
+    pub fn fun(&self) -> u8 {
+        (self.0 >> 8) as u8
+    }
+    pub fn reg(&self) -> u8 {
+        self.0 as u8
+    }
+}
+impl fmt::Debug for PciIoAddress {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        f.debug_struct("PciIoAddress")
+            .field("bus", &self.bus())
+            .field("dev", &self.dev())
+            .field("func", &self.fun())
+            .field("reg", &self.reg())
+            .field("ext_reg", &self.ext_reg())
+            .finish()
+    }
+}
+
+#[derive(Debug)]
+#[repr(C)]
+pub struct PciRootBridgeIoAccess<TAddr> {
+    pub read: unsafe extern "efiapi" fn(
+        this: *const PciRootBridgeIoProtocol,
+        width: PciRootBridgeIoProtocolWidth,
+        address: TAddr,
+        count: usize,
+        buffer: *mut c_void,
+    ) -> Status,
+    pub write: unsafe extern "efiapi" fn(
+        this: *const Self,
+        width: PciRootBridgeIoProtocolWidth,
+        address: TAddr,
+        count: usize,
+        buffer: *const c_void,
+    ) -> Status,
+}
+
+#[derive(Debug)]
+#[repr(C)]
+pub struct PciRootBridgeIoProtocol {
+    pub parent_handle: Handle,
+    pub poll_mem: unsafe extern "efiapi" fn(
+        this: *const Self,
+        width: PciRootBridgeIoProtocolWidth,
+        address: u64,
+        mask: u64,
+        value: u64,
+        delay: u64,
+        result: *mut u64,
+    ) -> Status,
+    pub poll_io: unsafe extern "efiapi" fn(
+        this: *const Self,
+        width: PciRootBridgeIoProtocolWidth,
+        address: u64,
+        mask: u64,
+        value: u64,
+        delay: u64,
+        result: *mut u64,
+    ) -> Status,
+    pub mem: PciRootBridgeIoAccess<u64>,
+    pub io: PciRootBridgeIoAccess<u64>,
+    pub pci: PciRootBridgeIoAccess<PciIoAddress>,
+    pub copy_mem: unsafe extern "efiapi" fn(
+        this: *const Self,
+        width: PciRootBridgeIoProtocolWidth,
+        dest_addr: u64,
+        src_addr: u64,
+        count: usize,
+    ) -> Status,
+    pub map: unsafe extern "efiapi" fn(
+        this: *const Self,
+        operation: PciRootBridgeIoProtocolOperation,
+        host_addr: *const c_void,
+        num_bytes: *mut usize,
+        device_addr: *mut PhysicalAddress,
+        mapping: *mut *mut c_void,
+    ) -> Status,
+    pub unmap: unsafe extern "efiapi" fn(this: *const Self, mapping: *const c_void) -> Status,
+    pub allocate_buffer: unsafe extern "efiapi" fn(
+        this: *const Self,
+        alloc_ty: AllocateType,
+        memory_ty: MemoryType,
+        pages: usize,
+        host_addr: *mut *const c_void,
+        attributes: u64,
+    ) -> Status,
+    pub free_buffer: unsafe extern "efiapi" fn(
+        this: *const Self,
+        pages: usize,
+        host_addr: *const c_void,
+    ) -> Status,
+    pub flush: unsafe extern "efiapi" fn(this: *const Self) -> Status,
+    pub get_attributes: unsafe extern "efiapi" fn(
+        this: *const Self,
+        supports: *mut u64,
+        attributes: *mut u64,
+    ) -> Status,
+    pub set_attributes: unsafe extern "efiapi" fn(
+        this: *const Self,
+        attributes: u64,
+        resource_base: *mut u64,
+        resource_length: *mut u64,
+    ) -> Status,
+    pub configuration:
+        unsafe extern "efiapi" fn(this: *const Self, resources: *mut *const c_void) -> Status,
+    pub segment_number: u32,
+}
+
+impl PciRootBridgeIoProtocol {
+    pub const GUID: Guid = guid!("2f707ebb-4a1a-11d4-9a38-0090273fc14d");
+}