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Merge pull request #283 from rust-osdev/release
Release version to 0.14.4
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Cargo.toml

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@@ -22,7 +22,7 @@ license = "MIT/Apache-2.0"
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name = "x86_64"
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readme = "README.md"
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repository = "https://github.com/rust-osdev/x86_64"
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version = "0.14.3"
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version = "0.14.4"
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edition = "2018"
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[dependencies]

Changelog.md

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# Unreleased
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# 0.14.4 – 2021-07-19
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- Add `instructions::tables::sgdt` ([#279](https://github.com/rust-osdev/x86_64/pull/279))
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- Improve control register bits ([#273](https://github.com/rust-osdev/x86_64/pull/273))
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- Add `Cr0` bits: `EXTENSION_TYPE` (ET)
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- Add `Cr4` bits:
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- `KEY_LOCKER` (KL)
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- `CONTROL_FLOW_ENFORCEMENT` (CET)
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- `PROTECTION_KEY_SUPERVISOR` (PKS)
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- Add `XCr0` bits: `BNDREG`, `BNDCSR`, `OPMASK`, `ZMM_HI256`, `HI16_ZMM`
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- Add consistency checks for `XCr0` bits
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- Add `SelectorErrorCode` for parsing interrupt error codes from `#TS`, `#NP`, `#SS`, and `#GP` ([#274](https://github.com/rust-osdev/x86_64/pull/274))
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- Make `addr::{align_up, align_down}` const ([#270](https://github.com/rust-osdev/x86_64/pull/270))
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- Make `structures::idt` available on stable Rust ([#271](https://github.com/rust-osdev/x86_64/pull/271))
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- Use dummy types for the `HandlerFunc`s if the `"abi_x86_interrupt"` feature is disabled
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- Add unsafe `set_handler_addr` that just takes a `VirtAddr`
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- Add common abstractions for x86 Segments ([#258](https://github.com/rust-osdev/x86_64/pull/258))
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- Add `SS`, `CS`, `DS`, `ES`, `FS`, `GS` marker types
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- Add `Segment` trait for reading/writing the segment register
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- Add `Segment64` trait for reading/writing the segment base
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- Add `GS::swap()`
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- Deprecate the corresponding free functions:
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- `cs`, `set_cs`
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- `swap_gs`
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- `load_{ss,ds,es,fs,gs}`
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- `{wr,rd}{fs,gs}base`
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- Bug fixes:
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- Corrected documentation typo ([#278](https://github.com/rust-osdev/x86_64/pull/278))
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- Avoided off-by-one error in `GlobalDescriptorTable::from_raw_slice` when `"const_fn"` is not enabled ([#269](https://github.com/rust-osdev/x86_64/pull/269))
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- Specify `sysv64` as the calling convention for the `"external_asm"` functions ([#267](https://github.com/rust-osdev/x86_64/pull/267))
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# 0.14.3 – 2021-05-14
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- Make the following types aliases of the new `PortGeneric` type ([#248](https://github.com/rust-osdev/x86_64/pull/248)):

src/instructions/segmentation.rs

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impl Segment for CS {
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get_reg_impl!("cs", x86_64_asm_get_cs);
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/// Note this is special since we cannot directly move to [`CS`]. Instead we
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/// push the new segment selector and return value on the stack and use
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/// `retfq` to reload [`CS`] and continue at the end of our function.
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/// Note this is special since we cannot directly move to [`CS`]; x86 requires the instruction
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/// pointer and [`CS`] to be set at the same time. To do this, we push the new segment selector
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/// and return value onto the stack and use a "far return" (`retfq`) to reload [`CS`] and
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/// continue at the end of our function.
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///
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/// Note we cannot use a "far call" (`lcall`) or "far jmp" (`ljmp`) to do this because then we
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/// would only be able to jump to 32-bit instruction pointers. Only Intel implements support
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/// for 64-bit far calls/jumps in long-mode, AMD does not.
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unsafe fn set_reg(sel: SegmentSelector) {
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#[cfg(feature = "inline_asm")]
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asm!(

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