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authoredJul 23, 2021
Merge pull request #1452 from fpistm/G0update
Update STM32G0 HAL and CMSIS drivers
2 parents 0686e2d + ad3de30 commit 5e72ff9

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‎libraries/SrcWrapper/src/HAL/stm32yyxx_hal_smbus_ex.c

+3-1
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@@ -2,7 +2,9 @@
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wunused-parameter"
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#ifdef STM32G4xx
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#ifdef STM32G0xx
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#include "stm32g0xx_hal_smbus_ex.c"
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#elif STM32G4xx
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#include "stm32g4xx_hal_smbus_ex.c"
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#elif STM32L0xx
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#include "stm32l0xx_hal_smbus_ex.c"

‎system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g030xx.h

+14-8
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@@ -14,17 +14,15 @@
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS_Device
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* @{
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*/
@@ -662,6 +660,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -1592,7 +1599,6 @@ typedef struct
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#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
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#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
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#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
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#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
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#define DMAMUX_CxCR_SOIE_Pos (8U)
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#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
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#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

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