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cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"
Commit c643bed moved qemu_init_vcpu() calls to common CPUState code. This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". The reason for the failure is that CPUClass::kvm_fd is not yet initialized in the following call graph: ->x86_cpu_realizefn ->x86_cpu_apic_realize ->qdev_init ->device_set_realized ->device_reset (hotplugged == 1) ->apic_reset_common ->vapic_base_update ->kvm_apic_vapic_base_update This causes attempted KVM vCPU ioctls to fail. By contrast, in the non-hotplug case the APIC is reset much later, when the vCPU is already initialized. As a quick and safe solution, move the qemu_init_vcpu() call back into the targets' realize functions. Reported-by: Chen Fan <[email protected]> Acked-by: Igor Mammedov <[email protected]> (for i386) Tested-by: Jia Liu <[email protected]> (for openrisc) Signed-off-by: Andreas Färber <[email protected]>
1 parent fdc4332 commit 14a10fc

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17 files changed

+45
-21
lines changed

17 files changed

+45
-21
lines changed

‎qom/cpu.c

-2
Original file line numberDiff line numberDiff line change
@@ -228,8 +228,6 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
228228
{
229229
CPUState *cpu = CPU(dev);
230230

231-
qemu_init_vcpu(cpu);
232-
233231
if (dev->hotplugged) {
234232
cpu_synchronize_post_init(cpu);
235233
notifier_list_notify(&cpu_added_notifiers, dev);

‎target-alpha/cpu.c

+3
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,11 @@ static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
3333

3434
static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
3535
{
36+
CPUState *cs = CPU(dev);
3637
AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
3738

39+
qemu_init_vcpu(cs);
40+
3841
acc->parent_realize(dev, errp);
3942
}
4043

‎target-arm/cpu.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -159,6 +159,7 @@ static void arm_cpu_finalizefn(Object *obj)
159159

160160
static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
161161
{
162+
CPUState *cs = CPU(dev);
162163
ARMCPU *cpu = ARM_CPU(dev);
163164
ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
164165
CPUARMState *env = &cpu->env;
@@ -214,7 +215,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
214215

215216
init_cpreg_list(cpu);
216217

217-
cpu_reset(CPU(cpu));
218+
cpu_reset(cs);
219+
qemu_init_vcpu(cs);
218220

219221
acc->parent_realize(dev, errp);
220222
}

‎target-cris/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -137,10 +137,11 @@ void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
137137

138138
static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
139139
{
140-
CRISCPU *cpu = CRIS_CPU(dev);
140+
CPUState *cs = CPU(dev);
141141
CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev);
142142

143-
cpu_reset(CPU(cpu));
143+
cpu_reset(cs);
144+
qemu_init_vcpu(cs);
144145

145146
ccc->parent_realize(dev, errp);
146147
}

‎target-i386/cpu.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -2333,6 +2333,7 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
23332333

23342334
static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
23352335
{
2336+
CPUState *cs = CPU(dev);
23362337
X86CPU *cpu = X86_CPU(dev);
23372338
X86CPUClass *xcc = X86_CPU_GET_CLASS(dev);
23382339
CPUX86State *env = &cpu->env;
@@ -2387,12 +2388,13 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
23872388
#endif
23882389

23892390
mce_init(cpu);
2391+
qemu_init_vcpu(cs);
23902392

23912393
x86_cpu_apic_realize(cpu, &local_err);
23922394
if (local_err != NULL) {
23932395
goto out;
23942396
}
2395-
cpu_reset(CPU(cpu));
2397+
cpu_reset(cs);
23962398

23972399
xcc->parent_realize(dev, &local_err);
23982400
out:

‎target-lm32/cpu.c

+4-2
Original file line numberDiff line numberDiff line change
@@ -46,10 +46,12 @@ static void lm32_cpu_reset(CPUState *s)
4646

4747
static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
4848
{
49-
LM32CPU *cpu = LM32_CPU(dev);
49+
CPUState *cs = CPU(dev);
5050
LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
5151

52-
cpu_reset(CPU(cpu));
52+
cpu_reset(cs);
53+
54+
qemu_init_vcpu(cs);
5355

5456
lcc->parent_realize(dev, errp);
5557
}

‎target-m68k/cpu.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -143,12 +143,14 @@ static const M68kCPUInfo m68k_cpus[] = {
143143

144144
static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
145145
{
146+
CPUState *cs = CPU(dev);
146147
M68kCPU *cpu = M68K_CPU(dev);
147148
M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
148149

149150
m68k_cpu_init_gdb(cpu);
150151

151-
cpu_reset(CPU(cpu));
152+
cpu_reset(cs);
153+
qemu_init_vcpu(cs);
152154

153155
mcc->parent_realize(dev, errp);
154156
}

‎target-microblaze/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -90,10 +90,11 @@ static void mb_cpu_reset(CPUState *s)
9090

9191
static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
9292
{
93-
MicroBlazeCPU *cpu = MICROBLAZE_CPU(dev);
93+
CPUState *cs = CPU(dev);
9494
MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev);
9595

96-
cpu_reset(CPU(cpu));
96+
cpu_reset(cs);
97+
qemu_init_vcpu(cs);
9798

9899
mcc->parent_realize(dev, errp);
99100
}

‎target-mips/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -62,10 +62,11 @@ static void mips_cpu_reset(CPUState *s)
6262

6363
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
6464
{
65-
MIPSCPU *cpu = MIPS_CPU(dev);
65+
CPUState *cs = CPU(dev);
6666
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
6767

68-
cpu_reset(CPU(cpu));
68+
cpu_reset(cs);
69+
qemu_init_vcpu(cs);
6970

7071
mcc->parent_realize(dev, errp);
7172
}

‎target-moxie/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -45,10 +45,11 @@ static void moxie_cpu_reset(CPUState *s)
4545

4646
static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
4747
{
48-
MoxieCPU *cpu = MOXIE_CPU(dev);
48+
CPUState *cs = CPU(dev);
4949
MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(dev);
5050

51-
cpu_reset(CPU(cpu));
51+
qemu_init_vcpu(cs);
52+
cpu_reset(cs);
5253

5354
mcc->parent_realize(dev, errp);
5455
}

‎target-openrisc/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -66,10 +66,11 @@ static inline void set_feature(OpenRISCCPU *cpu, int feature)
6666

6767
static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
6868
{
69-
OpenRISCCPU *cpu = OPENRISC_CPU(dev);
69+
CPUState *cs = CPU(dev);
7070
OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);
7171

72-
cpu_reset(CPU(cpu));
72+
qemu_init_vcpu(cs);
73+
cpu_reset(cs);
7374

7475
occ->parent_realize(dev, errp);
7576
}

‎target-ppc/translate_init.c

+2
Original file line numberDiff line numberDiff line change
@@ -7861,6 +7861,8 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
78617861
34, "power-spe.xml", 0);
78627862
}
78637863

7864+
qemu_init_vcpu(cs);
7865+
78647866
pcc->parent_realize(dev, errp);
78657867

78667868
#if defined(PPC_DUMP_CPU)

‎target-s390x/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -101,10 +101,11 @@ static void s390_cpu_machine_reset_cb(void *opaque)
101101

102102
static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
103103
{
104-
S390CPU *cpu = S390_CPU(dev);
104+
CPUState *cs = CPU(dev);
105105
S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
106106

107-
cpu_reset(CPU(cpu));
107+
qemu_init_vcpu(cs);
108+
cpu_reset(cs);
108109

109110
scc->parent_realize(dev, errp);
110111
}

‎target-sh4/cpu.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -240,10 +240,11 @@ static const TypeInfo sh7785_type_info = {
240240

241241
static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
242242
{
243-
SuperHCPU *cpu = SUPERH_CPU(dev);
243+
CPUState *cs = CPU(dev);
244244
SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev);
245245

246-
cpu_reset(CPU(cpu));
246+
cpu_reset(cs);
247+
qemu_init_vcpu(cs);
247248

248249
scc->parent_realize(dev, errp);
249250
}

‎target-sparc/cpu.c

+2
Original file line numberDiff line numberDiff line change
@@ -743,6 +743,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
743743
{
744744
SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
745745

746+
qemu_init_vcpu(CPU(dev));
747+
746748
scc->parent_realize(dev, errp);
747749
}
748750

‎target-unicore32/cpu.c

+2
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,8 @@ static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
9292
{
9393
UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev);
9494

95+
qemu_init_vcpu(CPU(dev));
96+
9597
ucc->parent_realize(dev, errp);
9698
}
9799

‎target-xtensa/cpu.c

+2
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,8 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
9090

9191
cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs;
9292

93+
qemu_init_vcpu(cs);
94+
9395
xcc->parent_realize(dev, errp);
9496
}
9597

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