@@ -846,6 +846,9 @@ static void generate_mac(uint8_t *mac_addr)
846846
847847#endif /* NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(0))) */
848848#endif
849+
850+ LOG_DBG ("MAC %02x:%02x:%02x:%02x:%02x:%02x" , mac_addr [0 ], mac_addr [1 ], mac_addr [2 ],
851+ mac_addr [3 ], mac_addr [4 ], mac_addr [5 ]);
849852}
850853
851854#if DT_HAS_COMPAT_STATUS_OKAY (st_stm32n6_ethernet )
@@ -990,28 +993,75 @@ static int eth_initialize(const struct device *dev)
990993
991994 heth -> Init .MACAddr = dev_data -> mac_addr ;
992995
993- #if defined(CONFIG_ETH_STM32_HAL_API_V1 )
996+ #if defined(CONFIG_ETH_STM32_HAL_API_V2 )
997+ HAL_StatusTypeDef hal_ret = HAL_OK ;
998+
999+ #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32n6_ethernet )
1000+ for (int ch = 0 ; ch < ETH_DMA_CH_CNT ; ch ++ ) {
1001+ heth -> Init .TxDesc [ch ] = dma_tx_desc_tab [ch ];
1002+ heth -> Init .RxDesc [ch ] = dma_rx_desc_tab [ch ];
1003+ }
1004+ #else
1005+ heth -> Init .TxDesc = dma_tx_desc_tab ;
1006+ heth -> Init .RxDesc = dma_rx_desc_tab ;
1007+ #endif
1008+ heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
1009+
1010+ hal_ret = HAL_ETH_Init (heth );
1011+ if (hal_ret == HAL_TIMEOUT ) {
1012+ /* HAL Init time out. This could be linked to */
1013+ /* a recoverable error. Log the issue and continue */
1014+ /* driver initialisation */
1015+ LOG_ERR ("HAL_ETH_Init Timed out" );
1016+ } else if (hal_ret != HAL_OK ) {
1017+ LOG_ERR ("HAL_ETH_Init failed: %d" , hal_ret );
1018+ return - EINVAL ;
1019+ }
1020+
1021+ #if defined(CONFIG_PTP_CLOCK_STM32_HAL )
1022+ /* Enable timestamping of RX packets. We enable all packets to be
1023+ * timestamped to cover both IEEE 1588 and gPTP.
1024+ */
1025+ #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32h7_ethernet )
1026+ heth -> Instance -> MACTSCR |= ETH_MACTSCR_TSENALL ;
1027+ #else
1028+ heth -> Instance -> PTPTSCR |= ETH_PTPTSCR_TSSARFE ;
1029+ #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
1030+ #endif /* CONFIG_PTP_CLOCK_STM32_HAL */
1031+
1032+ /* Tx config init: */
1033+ memset (& tx_config , 0 , sizeof (ETH_TxPacketConfig ));
1034+ tx_config .Attributes = ETH_TX_PACKETS_FEATURES_CSUM |
1035+ ETH_TX_PACKETS_FEATURES_CRCPAD ;
1036+ tx_config .ChecksumCtrl = IS_ENABLED (CONFIG_ETH_STM32_HW_CHECKSUM ) ?
1037+ ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC : ETH_CHECKSUM_DISABLE ;
1038+ tx_config .CRCPadCtrl = ETH_CRC_PAD_INSERT ;
1039+
1040+ /* prepare tx buffer header */
1041+ for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
1042+ dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
1043+ }
1044+
1045+ /* Initialize semaphores */
1046+ k_sem_init (& dev_data -> tx_int_sem , 0 , K_SEM_MAX_LIMIT );
1047+ #else /* CONFIG_ETH_STM32_HAL_API_V2 */
9941048 ret = eth_stm32_init_v1_api (dev );
9951049 if (ret < 0 ) {
9961050 LOG_ERR ("eth_init_v1_api failed: %d" , ret );
9971051 return - EIO ;
9981052 }
9991053
1000- /* Initialize semaphores */
1001- k_mutex_init (& dev_data -> tx_mutex );
1002- k_sem_init (& dev_data -> rx_int_sem , 0 , K_SEM_MAX_LIMIT );
1003-
10041054 HAL_ETH_DMATxDescListInit (heth , dma_tx_desc_tab ,
10051055 & dma_tx_buffer [0 ][0 ], ETH_TXBUFNB );
10061056 HAL_ETH_DMARxDescListInit (heth , dma_rx_desc_tab ,
10071057 & dma_rx_buffer [0 ][0 ], ETH_RXBUFNB );
1058+ #endif /* CONFIG_ETH_STM32_HAL_API_V2 */
10081059
1009- #endif /* !CONFIG_ETH_STM32_HAL_API_V1 */
1060+ /* Initialize semaphores */
1061+ k_mutex_init (& dev_data -> tx_mutex );
1062+ k_sem_init (& dev_data -> rx_int_sem , 0 , K_SEM_MAX_LIMIT );
10101063
1011- LOG_DBG ("MAC %02x:%02x:%02x:%02x:%02x:%02x" ,
1012- dev_data -> mac_addr [0 ], dev_data -> mac_addr [1 ],
1013- dev_data -> mac_addr [2 ], dev_data -> mac_addr [3 ],
1014- dev_data -> mac_addr [4 ], dev_data -> mac_addr [5 ]);
1064+ setup_mac_filter (heth );
10151065
10161066 return 0 ;
10171067}
@@ -1066,71 +1116,6 @@ static void eth_stm32_mcast_filter(const struct device *dev, const struct ethern
10661116
10671117#endif /* CONFIG_ETH_STM32_MULTICAST_FILTER */
10681118
1069- #if defined(CONFIG_ETH_STM32_HAL_API_V2 )
1070- static int eth_init_api_v2 (const struct device * dev )
1071- {
1072- HAL_StatusTypeDef hal_ret = HAL_OK ;
1073- struct eth_stm32_hal_dev_data * dev_data ;
1074- ETH_HandleTypeDef * heth ;
1075-
1076- dev_data = dev -> data ;
1077- heth = & dev_data -> heth ;
1078-
1079- #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32n6_ethernet )
1080- for (int ch = 0 ; ch < ETH_DMA_CH_CNT ; ch ++ ) {
1081- heth -> Init .TxDesc [ch ] = dma_tx_desc_tab [ch ];
1082- heth -> Init .RxDesc [ch ] = dma_rx_desc_tab [ch ];
1083- }
1084- #else
1085- heth -> Init .TxDesc = dma_tx_desc_tab ;
1086- heth -> Init .RxDesc = dma_rx_desc_tab ;
1087- #endif
1088- heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
1089-
1090- hal_ret = HAL_ETH_Init (heth );
1091- if (hal_ret == HAL_TIMEOUT ) {
1092- /* HAL Init time out. This could be linked to */
1093- /* a recoverable error. Log the issue and continue */
1094- /* driver initialisation */
1095- LOG_ERR ("HAL_ETH_Init Timed out" );
1096- } else if (hal_ret != HAL_OK ) {
1097- LOG_ERR ("HAL_ETH_Init failed: %d" , hal_ret );
1098- return - EINVAL ;
1099- }
1100-
1101- #if defined(CONFIG_PTP_CLOCK_STM32_HAL )
1102- /* Enable timestamping of RX packets. We enable all packets to be
1103- * timestamped to cover both IEEE 1588 and gPTP.
1104- */
1105- #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32h7_ethernet )
1106- heth -> Instance -> MACTSCR |= ETH_MACTSCR_TSENALL ;
1107- #else
1108- heth -> Instance -> PTPTSCR |= ETH_PTPTSCR_TSSARFE ;
1109- #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
1110- #endif /* CONFIG_PTP_CLOCK_STM32_HAL */
1111-
1112- /* Initialize semaphores */
1113- k_mutex_init (& dev_data -> tx_mutex );
1114- k_sem_init (& dev_data -> rx_int_sem , 0 , K_SEM_MAX_LIMIT );
1115- k_sem_init (& dev_data -> tx_int_sem , 0 , K_SEM_MAX_LIMIT );
1116-
1117- /* Tx config init: */
1118- memset (& tx_config , 0 , sizeof (ETH_TxPacketConfig ));
1119- tx_config .Attributes = ETH_TX_PACKETS_FEATURES_CSUM |
1120- ETH_TX_PACKETS_FEATURES_CRCPAD ;
1121- tx_config .ChecksumCtrl = IS_ENABLED (CONFIG_ETH_STM32_HW_CHECKSUM ) ?
1122- ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC : ETH_CHECKSUM_DISABLE ;
1123- tx_config .CRCPadCtrl = ETH_CRC_PAD_INSERT ;
1124-
1125- /* prepare tx buffer header */
1126- for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
1127- dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
1128- }
1129-
1130- return 0 ;
1131- }
1132- #endif /* CONFIG_ETH_STM32_HAL_API_V2 */
1133-
11341119static void set_mac_config (const struct device * dev , struct phy_link_state * state )
11351120{
11361121 struct eth_stm32_hal_dev_data * dev_data = dev -> data ;
@@ -1259,16 +1244,6 @@ static void eth_iface_init(struct net_if *iface)
12591244
12601245 ethernet_init (iface );
12611246
1262- #if defined(CONFIG_ETH_STM32_HAL_API_V2 )
1263- /* This function requires the Ethernet interface to be
1264- * properly initialized. In auto-negotiation mode, it reads the speed
1265- * and duplex settings to configure the driver accordingly.
1266- */
1267- eth_init_api_v2 (dev );
1268- #endif
1269-
1270- setup_mac_filter (heth );
1271-
12721247 net_if_carrier_off (iface );
12731248
12741249 net_lldp_set_lldpdu (iface );
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