STM32WBA5x SPI not compiling

[ivanwagner]

Describe the bug

It seems that support for STM32WBA5x under zephyr/drivers/spi/spi_ll_stm32.c is lacking and giving compilation errors during compilation.

Regression

• This is a regression.

Steps to reproduce

To reproduce it you need to compile for one of the STM32WBA5x variants and you need to have at least one peripheral using the SPI in your device tree.

Relevant log output

zephyr/drivers/spi/spi_ll_stm32.h: In function 'll_func_tx_is_not_full':
zephyr/drivers/spi/spi_ll_stm32.h:111:16: warning: implicit declaration of function 'LL_SPI_IsActiveFlag_TXE'; did you mean 'LL_SPI_IsActiveFlag_TXC'? [-Wimplicit-function-declaration]
  111 |         return LL_SPI_IsActiveFlag_TXE(spi);
      |                ^~~~~~~~~~~~~~~~~~~~~~~
      |                LL_SPI_IsActiveFlag_TXC
zephyr/drivers/spi/spi_ll_stm32.h: In function 'll_func_rx_is_not_empty':
zephyr/drivers/spi/spi_ll_stm32.h:120:16: warning: implicit declaration of function 'LL_SPI_IsActiveFlag_RXNE'; did you mean 'LL_SPI_IsActiveFlag_RXWNE'? [-Wimplicit-function-declaration]
  120 |         return LL_SPI_IsActiveFlag_RXNE(spi);
      |                ^~~~~~~~~~~~~~~~~~~~~~~~
      |                LL_SPI_IsActiveFlag_RXWNE
zephyr/drivers/spi/spi_ll_stm32.h: In function 'll_func_enable_int_tx_empty':
zephyr/drivers/spi/spi_ll_stm32.h:129:9: warning: implicit declaration of function 'LL_SPI_EnableIT_TXE'; did you mean 'LL_SPI_EnableIT_TXP'? [-Wimplicit-function-declaration]
  129 |         LL_SPI_EnableIT_TXE(spi);
      |         ^~~~~~~~~~~~~~~~~~~
      |         LL_SPI_EnableIT_TXP
zephyr/drivers/spi/spi_ll_stm32.h: In function 'll_func_enable_int_rx_not_empty':
zephyr/drivers/spi/spi_ll_stm32.h:138:9: warning: implicit declaration of function 'LL_SPI_EnableIT_RXNE'; did you mean 'LL_SPI_EnableIT_RXP'? [-Wimplicit-function-declaration]
  138 |         LL_SPI_EnableIT_RXNE(spi);
      |         ^~~~~~~~~~~~~~~~~~~~
      |         LL_SPI_EnableIT_RXP
zephyr/drivers/spi/spi_ll_stm32.h: In function 'll_func_enable_int_errors':
zephyr/drivers/spi/spi_ll_stm32.h:151:9: warning: implicit declaration of function 'LL_SPI_EnableIT_ERR'; did you mean 'LL_SPI_EnableIT_FRE'? [-Wimplicit-function-declaration]
  151 |         LL_SPI_EnableIT_ERR(spi);

...

zephyr/drivers/spi/spi_ll_stm32.c: In function 'spi_stm32_get_err':
zephyr/drivers/spi/spi_ll_stm32.c:61:44: error: 'LL_SPI_SR_CRCERR' undeclared (first use in this function); did you mean 'LL_SPI_SR_CRCE'?
   61 | #define SPI_STM32_ERR_MSK (LL_SPI_SR_UDR | LL_SPI_SR_CRCERR | LL_SPI_SR_MODF | \
      |                                            ^~~~~~~~~~~~~~~~
zephyr/drivers/spi/spi_ll_stm32.c:61:44: note: in definition of macro 'SPI_STM32_ERR_MSK'
   61 | #define SPI_STM32_ERR_MSK (LL_SPI_SR_UDR | LL_SPI_SR_CRCERR | LL_SPI_SR_MODF | \
      |                                            ^~~~~~~~~~~~~~~~
zephyr/drivers/spi/spi_ll_stm32.c:61:44: note: each undeclared identifier is reported only once for each function it appears in
   61 | #define SPI_STM32_ERR_MSK (LL_SPI_SR_UDR | LL_SPI_SR_CRCERR | LL_SPI_SR_MODF | \
      |                                            ^~~~~~~~~~~~~~~~
zephyr/drivers/spi/spi_ll_stm32.c:61:44: note: in definition of macro 'SPI_STM32_ERR_MSK'
   61 | #define SPI_STM32_ERR_MSK (LL_SPI_SR_UDR | LL_SPI_SR_CRCERR | LL_SPI_SR_MODF | \
      |                                            ^~~~~~~~~~~~~~~~
zephyr/drivers/spi/spi_ll_stm32.c:62:44: error: 'LL_SPI_SR_FRE' undeclared (first use in this function); did you mean 'LL_SPI_SR_TIFRE'?
   62 |                            LL_SPI_SR_OVR | LL_SPI_SR_FRE)
      |                                            ^~~~~~~~~~~~~
zephyr/drivers/spi/spi_ll_stm32.c:62:44: note: in definition of macro 'SPI_STM32_ERR_MSK'
   62 |                            LL_SPI_SR_OVR | LL_SPI_SR_FRE)

Impact

Showstopper – Prevents release or major functionality; system unusable.

Environment

OS: Ubuntu 24.04
Toolchain: Zephyr 0.17.1
Commit: main branch

Additional Context

No response

[cfriedt]

@ivanwagner - just out of curiosity, have you done a west update? Sometimes the main Zephyr repository might require an update to a HAL module to pull in new or updated headers and sources.

[ivanwagner]

@cfriedt yes I tried yesterday with the latest main doing a west update.

[kbidani]

I have compiled and tested the code with the NUCLEO-WBA55CG target, including at least one SPI peripheral in the device tree. The build completed successfully, and the SPI functionality works as expected. I did not encounter any compilation errors.

Environment:
Commit: main branch
OS: Windows 11 Enterprise
commit zephyr: c9087bc
commit hal_stm32: zephyrproject-rtos/hal_stm32@1e75326

[kbidani]

log test spi_loopback:

*** Booting Zephyr OS build v4.2.0-1894-gc9087bce7594 ***
SPI test on buffers TX/RX 0x20004440/0x20004420, frame size = 8
Polling...Running TESTSUITE spi_extra_api_features
===================================================================
START - test_spi_hold_on_cs
 PASS - test_spi_hold_on_cs in 0.004 seconds
===================================================================
START - test_spi_lock_release
 PASS - test_spi_lock_release in 0.002 seconds
===================================================================
TESTSUITE spi_extra_api_features succeeded
Running TESTSUITE spi_extra_api_features
===================================================================
START - test_spi_hold_on_cs
 PASS - test_spi_hold_on_cs in 0.004 seconds
===================================================================
START - test_spi_lock_release
 PASS - test_spi_lock_release in 0.002 seconds
===================================================================
TESTSUITE spi_extra_api_features succeeded
Running TESTSUITE spi_loopback
===================================================================
Testing loopback spec: SLOW
START - test_nop_nil_bufs
 PASS - test_nop_nil_bufs in 0.001 seconds
===================================================================
START - test_spi_async_call
 PASS - test_spi_async_call in 0.343 seconds
===================================================================
START - test_spi_complete_large_transfers
 PASS - test_spi_complete_large_transfers in 0.337 seconds
===================================================================
START - test_spi_complete_loop_mode_0
 PASS - test_spi_complete_loop_mode_0 in 0.002 seconds
===================================================================
START - test_spi_complete_loop_mode_1
 PASS - test_spi_complete_loop_mode_1 in 0.002 seconds
===================================================================
START - test_spi_complete_loop_mode_2
 PASS - test_spi_complete_loop_mode_2 in 0.002 seconds
===================================================================
START - test_spi_complete_loop_mode_3
 PASS - test_spi_complete_loop_mode_3 in 0.002 seconds
===================================================================
START - test_spi_complete_multiple
 PASS - test_spi_complete_multiple in 0.003 seconds
===================================================================
START - test_spi_complete_multiple_timed
Transfer took 2280 us vs theoretical minimum 864 us
Latency measurement: 1416 us
 PASS - test_spi_complete_multiple_timed in 0.010 seconds
===================================================================
START - test_spi_concurrent_transfer_different_spec
 PASS - test_spi_concurrent_transfer_different_spec in 0.007 seconds
===================================================================
START - test_spi_concurrent_transfer_same_spec
 PASS - test_spi_concurrent_transfer_same_spec in 0.007 seconds
===================================================================
START - test_spi_deinit
  zephyr,user miso-gpios or mosi-gpios are not defined
 SKIP - test_spi_deinit in 0.006 seconds
===================================================================
START - test_spi_null_rx_buf_set
 PASS - test_spi_null_rx_buf_set in 0.002 seconds
===================================================================
START - test_spi_null_tx_buf
 PASS - test_spi_null_tx_buf in 0.002 seconds
===================================================================
START - test_spi_null_tx_buf_set
 PASS - test_spi_null_tx_buf_set in 0.002 seconds
===================================================================
START - test_spi_null_tx_rx_buf_set
 PASS - test_spi_null_tx_rx_buf_set in 0.001 seconds
===================================================================
START - test_spi_rx_bigger_than_tx
 PASS - test_spi_rx_bigger_than_tx in 0.002 seconds
===================================================================
START - test_spi_rx_every_4
 PASS - test_spi_rx_every_4 in 0.002 seconds
===================================================================
START - test_spi_rx_half_end
 PASS - test_spi_rx_half_end in 0.002 seconds
===================================================================
START - test_spi_rx_half_start
 PASS - test_spi_rx_half_start in 0.002 seconds
===================================================================
START - test_spi_same_buf_cmd
 PASS - test_spi_same_buf_cmd in 0.002 seconds
===================================================================
START - test_spi_word_size_16
 PASS - test_spi_word_size_16 in 0.002 seconds
===================================================================
START - test_spi_word_size_24
Spi config invalid for this controller
 SKIP - test_spi_word_size_24 in 0.004 seconds
===================================================================
START - test_spi_word_size_32
Spi config invalid for this controller
 SKIP - test_spi_word_size_32 in 0.004 seconds
===================================================================
START - test_spi_word_size_7
Spi config invalid for this controller
 SKIP - test_spi_word_size_7 in 0.004 seconds
===================================================================
START - test_spi_word_size_9
Spi config invalid for this controller
 SKIP - test_spi_word_size_9 in 0.004 seconds
===================================================================
START - test_spi_write_back
 PASS - test_spi_write_back in 0.002 seconds
===================================================================
TESTSUITE spi_loopback succeeded
Running TESTSUITE spi_loopback
===================================================================
Testing loopback spec: FAST
START - test_nop_nil_bufs
 PASS - test_nop_nil_bufs in 0.001 seconds
===================================================================
START - test_spi_async_call
 PASS - test_spi_async_call in 0.190 seconds
===================================================================
START - test_spi_complete_large_transfers
 PASS - test_spi_complete_large_transfers in 0.186 seconds
===================================================================
START - test_spi_complete_loop_mode_0
 PASS - test_spi_complete_loop_mode_0 in 0.001 seconds
===================================================================
START - test_spi_complete_loop_mode_1
 PASS - test_spi_complete_loop_mode_1 in 0.001 seconds
===================================================================
START - test_spi_complete_loop_mode_2
 PASS - test_spi_complete_loop_mode_2 in 0.001 seconds
===================================================================
START - test_spi_complete_loop_mode_3
 PASS - test_spi_complete_loop_mode_3 in 0.001 seconds
===================================================================
START - test_spi_complete_multiple
 PASS - test_spi_complete_multiple in 0.002 seconds
===================================================================
START - test_spi_complete_multiple_timed
Transfer took 1290 us vs theoretical minimum 27 us
Latency measurement: 1263 us
 PASS - test_spi_complete_multiple_timed in 0.009 seconds
===================================================================
START - test_spi_concurrent_transfer_different_spec
 PASS - test_spi_concurrent_transfer_different_spec in 0.005 seconds
===================================================================
START - test_spi_concurrent_transfer_same_spec
 PASS - test_spi_concurrent_transfer_same_spec in 0.005 seconds
===================================================================
START - test_spi_deinit
  zephyr,user miso-gpios or mosi-gpios are not defined
 SKIP - test_spi_deinit in 0.006 seconds
===================================================================
START - test_spi_null_rx_buf_set
 PASS - test_spi_null_rx_buf_set in 0.001 seconds
===================================================================
START - test_spi_null_tx_buf
 PASS - test_spi_null_tx_buf in 0.001 seconds
===================================================================
START - test_spi_null_tx_buf_set
 PASS - test_spi_null_tx_buf_set in 0.001 seconds
===================================================================
START - test_spi_null_tx_rx_buf_set
 PASS - test_spi_null_tx_rx_buf_set in 0.001 seconds
===================================================================
START - test_spi_rx_bigger_than_tx
 PASS - test_spi_rx_bigger_than_tx in 0.001 seconds
===================================================================
START - test_spi_rx_every_4
 PASS - test_spi_rx_every_4 in 0.001 seconds
===================================================================
START - test_spi_rx_half_end
 PASS - test_spi_rx_half_end in 0.001 seconds
===================================================================
START - test_spi_rx_half_start
 PASS - test_spi_rx_half_start in 0.001 seconds
===================================================================
START - test_spi_same_buf_cmd
 PASS - test_spi_same_buf_cmd in 0.001 seconds
===================================================================
START - test_spi_word_size_16
 PASS - test_spi_word_size_16 in 0.001 seconds
===================================================================
START - test_spi_word_size_24
Spi config invalid for this controller
 SKIP - test_spi_word_size_24 in 0.004 seconds
===================================================================
START - test_spi_word_size_32
Spi config invalid for this controller
 SKIP - test_spi_word_size_32 in 0.004 seconds
===================================================================
START - test_spi_word_size_7
Spi config invalid for this controller
 SKIP - test_spi_word_size_7 in 0.004 seconds
===================================================================
START - test_spi_word_size_9
Spi config invalid for this controller
 SKIP - test_spi_word_size_9 in 0.004 seconds
===================================================================
START - test_spi_write_back
 PASS - test_spi_write_back in 0.001 seconds
===================================================================
TESTSUITE spi_loopback succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [spi_extra_api_features]: pass = 2, fail = 0, skip = 0, total = 2 duration = 0.006 seconds
 - PASS - [spi_extra_api_features.test_spi_hold_on_cs] duration = 0.004 seconds
 - PASS - [spi_extra_api_features.test_spi_lock_release] duration = 0.002 seconds

SUITE PASS - 100.00% [spi_loopback]: pass = 22, fail = 0, skip = 5, total = 27 duration = 0.759 seconds
 - PASS - [spi_loopback.test_nop_nil_bufs] duration = 0.001 seconds
 - PASS - [spi_loopback.test_spi_async_call] duration = 0.343 seconds
 - PASS - [spi_loopback.test_spi_complete_large_transfers] duration = 0.337 seconds
 - PASS - [spi_loopback.test_spi_complete_loop_mode_0] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_complete_loop_mode_1] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_complete_loop_mode_2] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_complete_loop_mode_3] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_complete_multiple] duration = 0.003 seconds
 - PASS - [spi_loopback.test_spi_complete_multiple_timed] duration = 0.010 seconds
 - PASS - [spi_loopback.test_spi_concurrent_transfer_different_spec] duration = 0.007 seconds
 - PASS - [spi_loopback.test_spi_concurrent_transfer_same_spec] duration = 0.007 seconds
 - SKIP - [spi_loopback.test_spi_deinit] duration = 0.006 seconds
 - PASS - [spi_loopback.test_spi_null_rx_buf_set] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_null_tx_buf] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_null_tx_buf_set] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_null_tx_rx_buf_set] duration = 0.001 seconds
 - PASS - [spi_loopback.test_spi_rx_bigger_than_tx] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_rx_every_4] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_rx_half_end] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_rx_half_start] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_same_buf_cmd] duration = 0.002 seconds
 - PASS - [spi_loopback.test_spi_word_size_16] duration = 0.002 seconds
 - SKIP - [spi_loopback.test_spi_word_size_24] duration = 0.004 seconds
 - SKIP - [spi_loopback.test_spi_word_size_32] duration = 0.004 seconds
 - SKIP - [spi_loopback.test_spi_word_size_7] duration = 0.004 seconds
 - SKIP - [spi_loopback.test_spi_word_size_9] duration = 0.004 seconds
 - PASS - [spi_loopback.test_spi_write_back] duration = 0.002 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

[ivanwagner]

Ok I am able to reproduce it. The error happens when in the spi node the following is added and then a child device:
compatible = "st,stm32-spi";

[erwango]

@ivanwagner This isn't clear. Can you provide the modification you're doing on the .dts ?
In theory in board dts description (or in overlay), you're not supposed to modify the compatible property.