Add packed f16x2 arithmetic intrinsics

[honeyspoon]

Summary

Adds nine packed f16x2 arithmetic intrinsics across all four compiler layers (cuda-device, dialect-nvvm, mir-importer, mir-lower), mirroring the existing bf16x2 module (#279).

add.rn.f16x2    %d, %a, %b;
sub.rn.f16x2    %d, %a, %b;
mul.rn.f16x2    %d, %a, %b;
fma.rn.f16x2    %d, %a, %b, %c;
neg.f16x2       %d, %a;
abs.f16x2       %d, %a;
min.f16x2       %d, %a, %b;      // sm_80+
max.f16x2       %d, %a, %b;      // sm_80+
fma.rn.relu.f16x2 %d, %a, %b, %c; // sm_80+

f16 is more widely used than bf16 in many inference workloads. This closes the gap where bf16x2 had full arithmetic support but f16x2 did not.

Part of tracking issue #274 (Phase 6).

What changed

• cuda-device: Added f16x2 module with 9 user-facing #[inline(never)] stubs.
• dialect-nvvm: Added 9 operations (AddF16x2Op, SubF16x2Op, ...) with verifier tests.
• mir-importer: Added dispatch table entries and f16x2 intrinsic emitter module.
• mir-lower: Added lowering conversions (inline asm with =r,r,r constraints for binary ops, =r,r,r,r for ternary). sm_80+ ops added to pipeline feature detection.
• Lowering tests for all 9 variants.

Testing

• cargo fmt --check clean
• cargo test -p dialect-nvvm --all-targets — verifier tests pass
• cargo test -p mir-lower --all-targets — lowering tests pass
• cargo oxide run e2e on sm_80+ GPU

Checklist

• Signed-off-by DCO trailer
• No crates/cuda-bindings/ changes
• SPDX headers on new source files