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docs(dn): update Ibrahim Hashim dn for week of september 22 #399

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12 changes: 11 additions & 1 deletion src/design_notebooks/2025fall/irh8156.md
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Expand Up @@ -15,4 +15,14 @@ Project Work:
* [Program Counter]: Wrote and tested a simple pc16 verilog module for the RiSC-16 CPU:([PC Implementation](https://github.com/1fHu/ProcessorDesign/))

Comments:
* My team implemented the Program counter. We saved the module as pc16.v and verified its behavior with simple simulations.
* My team implemented the Program counter. We saved the module as pc16.v and verified its behavior with simple simulations.


## Week of 22 September 2025

Project Work:
* [Testing Program Counter]: Tested the program counter with the test bench and made it compatible with it as well: ([Edited PC Implementation](https://github.com/ihash123/processorDesign))
* [ALU Implementation]: Wrote and tested a simple alu verilog module for the RiSC-16 CPU: ([ALU Implementation](https://github.com/ihash123/processorDesign))

Comments:
* Worked with my team to test the program counter and implement the ALU as alu.v, and verified the behavior with simple tests.