Releases: OpenDevicePartnership/patina-paging
Release list
v11.0.6
What's Changed
-
Chore: Update crate versions to 11.0.6 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#214)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
Gate coverage\_attribute behind the coverage\_nightly cfg [Rebase \& FF] @makubacki (#212)
Change Details
## Description
cargo-llvm-cov sets the
coverage_nightlycfg during coverage runs.See the Readme: https://crates.io/crates/cargo-llvm-cov
This commit declares it once in
[workspace.lints.rust]so crates can gate the unstablecoverage_attributefeature behind it without causing theunexpected_cfgslint to trigger.Also wraps both the
coverage_attributefeature gate and everycoverage(off)attribute incfg_attr(coverage_nightly, ...)so the unstable feature is active only during coverage runs, where cargo-llvm-cov sets thecoverage_nightlycfg.This is documented and the wrapping pattern is suggested in the cargo-llvm-cov Readme:
Since #[coverage(off)] is unstable, it is recommended to use it
together with cfg(coverage) or cfg(coverage_nightly) set by
cargo-llvm-cov.#![cfg_attr(coverage_nightly, feature(coverage_attribute))] // function #[cfg_attr(coverage_nightly, coverage(off))] fn exclude_fn_from_coverage() { // ... } // module #[cfg_attr(coverage_nightly, coverage(off))] mod exclude_mod_from_coverage { // ... }
This isolates the
coverage_attributefeature to coverage runs, so the unstable feature is not used in other builds (e.g.check,clippy,build,test, etc.).- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
- Testing with
RUSTC_BOOTSTRAP=1andallow-featuresset withoutcoverage_attribute, verified non-coverage commands likecargo make testandcargo make checksucceed.
Integration Instructions
- N/A
Full Changelog: v11.0.5...v11.0.6
v11.0.5
What's Changed
-
Chore: Update crate versions to 11.0.5 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#209)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
[Rebase \& FF] Adding "supervisor" feature flag and page table iterator @kuqin12 (#182)
Change Details
## Description
This change adds the
mm_supvfeature, which will honor the supervisor mask definition and apply the appropriate supervisor bit in the page table entries (leaf level only).In addition, this feature also assumes the page table is marked as read only, which means paging protection needs to be disabled when the content is updated.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
This was tested with QEMU Q35 platform + rust supervisor and booted to Windows desktop.
Integration Instructions
For modules that works with supervisor level paging, one needs to build with
mm_supvfeature flag.</blockquote> <hr> </details>
-
deny.toml: Update license exceptions and duplicate skip list @makubacki (#208)
Change Details
## Description
- The relatively small number of dependencies in this repo no longer require exceptions for the
0BSDandBSD-3-Clauselicenses. - This
bitflagsduplicate skip entry is no longer needed.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Before (
cargo make deny)[cargo-make] INFO - cargo make 0.37.24 [cargo-make] INFO - [cargo-make] INFO - Project: patina_paging [cargo-make] INFO - Build File: Makefile.toml [cargo-make] INFO - Task: deny [cargo-make] INFO - Profile: development [cargo-make] INFO - Execute Command: "cargo" "deny" "check" warning[license-exception-not-encountered]: license exception was not encountered ┌─ patina-paging\deny.toml:94:34 │ 94 │ { allow = ["0BSD"], crate = "managed" }, │ ━━━━━━━ unmatched license exception warning[license-exception-not-encountered]: license exception was not encountered ┌─ patina-paging\deny.toml:95:42 │ 95 │ { allow = ["BSD-3-Clause"], crate = "alloc-no-stdlib" }, │ ━━━━━━━━━━━━━━━ unmatched license exception warning[unnecessary-skip]: skip 'bitflags' applied to a crate with only one version ┌─ patina-paging\deny.toml:175:16 │ 175 │ { crate = "bitflags", reason = "Need https://github.com/gz/rust-x86/pull/150 to be merged into rust-x86." } │ ━━━━━━━━ ──────────────────────────────────────────────────────────────────────── reason │ │ │ unnecessary skip configuration advisories ok, bans ok, licenses ok, sources okAfter (
cargo make deny)[cargo-make] INFO - cargo make 0.37.24 [cargo-make] INFO - [cargo-make] INFO - Project: patina_mtrr [cargo-make] INFO - Build File: Makefile.toml [cargo-make] INFO - Task: deny [cargo-make] INFO - Profile: development [cargo-make] INFO - Execute Command: "cargo" "deny" "check" advisories ok, bans ok, licenses ok, sources ok [cargo-make] INFO - Build Done in 7.18 seconds.Integration Instructions
- N/A
- The relatively small number of dependencies in this repo no longer require exceptions for the
Full Changelog: v11.0.4...v11.0.5
v11.0.4
What's Changed
-
Chore: Update crate versions to 11.0.4 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#197)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
Fix multiple AArch64 bugs @cfernald (#195)
Change Details
## Description
This commit fixes two bugs in the aarch64 implementation.
-
The cache operations routine is incrementing by the mask instead of the cache line size. This could cause lines to not be addressed when iterating more lines than the cache line size.
-
The page entry swap logic is missing handling for the TLB invalidation for EL1.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
- Boot on SBSA
- Boot on physical AArch64 device
Integration Instructions
N/A
</blockquote> <hr> </details> -
-
[REBASE \& FF] Fix caching issue with page table install and MMU disable @cfernald (#194)
Change Details
# Move page table installation to assembly and disable MMU
Commit 49c9032 introduced logic to disable the MMU when changing page tables
if the geometry of the paging level changes. This is required because the
TCR and TTBR0 registers are interdependent and cannot be updated atomically.
However, the current implementation introduces cache issue as the cacheability
of memory when the MMU is disabled is not well defined. This is particularly
problematic for the instruction stream and the stack, which leads to unstable
behavior.This commit moves the entire swap of all the relevant registers to a dedicated
assembly routine, which ensures that the scope of access with the MMU disabled
is contained. Additionally, the assembly routine will be written-back from
the cache prior to invocation to ensure the correct code is executed.This change opts to always disable the MMU when swapping the page tables,
even if the paging type is not changing. This is dione for 2 reasons:-
The current approach makes brittle assumptions on the configuration of
the page tables at launch such as TCR and MAIR. While these assumptions are
true today because this crate follows EDK2 style paging, these are not guaranteed
to stay aligned. By always disabling the MMU, future incompatibilities will
not lead to unstable behavior. -
Attempting to determine when to disable the MMU adds complexity and edge
cases and provides very little benefit. This is better avoided.
Fix incomplete implementation of aarch64 detect_paging_type
This commit fixes a couple issues in aarch64's detect_paging_type function.
-
The implementation currently assumes 4kb granules, but does not check it.
-
The implementation currently does not allow for 5-level paging VA sizes
other then 52 bits.
Resolves: #192
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
- QEMU SBSA Boot
- Physical aarch64 platform boot
Integration Instructions
N/A
</blockquote> <hr> </details> -
Full Changelog: v11.0.3...v11.0.4
v11.0.3
What's Changed
-
Chore: Update crate versions to 11.0.3 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#191)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
Fixing T0SZ allowed values @atsvetov (#190)
Change Details
## Description
Enabling T0SZ values 16-24 without the need to disable MMU.
This is intended to fix:
#189- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Tested on a proprietary HW
Integration Instructions
N/A
Full Changelog: v11.0.2...v11.0.3
v11.0.2
What's Changed
-
Chore: Update crate versions to 11.0.2 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#186)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
Add partial support for 5-level paging on AArch64 @cfernald (#184)
Change Details
## Description
This commit adds support for opening and inspecting 5-level page tables on aarch64. This change prevents creating or installing of such tables. This is needed to support the EDK2 2511 PEI changes that causes DXE to be launched with 5-level paging enabled. Patina will continue to use 4-level paging for now, but 5-level support is required for early debugger and exception parsing support. For this reason, this commit introduces a
open_activefunction that opens the active table to reduce duplicated logic in consumers.To account for transitioning from 5-level to 4-level paging, logic is added to installation that will disable the MMU in scenarios where the active page table configuration is changing, to avoid faults when adjusting the configuration abd tables.
Resolves: #178
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Local tests, SBSA regression testing, and 2511 integration testing
Integration Instructions
N/A
</blockquote> <hr> </details>
-
[Rebase \& FF] Inherit page table attribute from parent entries @kuqin12 (#175)
Change Details
## Description
The original page table query logic assumed that all parent-level entries were marked with the most permissive attributes, allowing the leaf entry to directly reflect the effective attributes during a query.
However, since patina-paging also supports initialization from an existing page table, this assumption does not always hold. The query logic must instead accurately model attribute inheritance across the page table hierarchy.
This change fixes the issue by introducing an additional input parameter to the internal helper, allowing the query to correctly propagate and reflect parent attributes.
This change also adds a bit definition of
EFI_MEMORY_SPfor completeness.- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
This was tested on QEMU Q35 and booted to UEFI shell, as well as on physical AArch64 platform and booted to Windows desktop.
Integration Instructions
N/A
</blockquote> <hr> </details>
Full Changelog: v11.0.1...v11.0.2
v11.0.1
What's Changed
-
Drop Unmap Large Page Print @os-d (#173)
Change Details
## Description
This print is noisy and does not provide much value. Drop it. The split print is much more important.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A.
Integration Instructions
N/A.
</blockquote> <hr> </details>
Full Changelog: v11.0.0...v11.0.1
v11.0.0
What's Changed
-
Chore: Update crate versions to 11.0.0 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#169)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
Remove stale markdownlint configuration file @makubacki (#163)
Change Details
## Description
This file is no longer needed as the project has moved to using a synced file from patina-devops called
.markdownlint.yaml.- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
cargo make all- Run markdownlint
Integration Instructions
- N/A
-
Print When Unmapping/Splitting Large Page @os-d (#144)
Change Details
## Description
There have been a number of speculative execution/TLB mgmt bugs when unmapping/splitting large pages. This happens infrequently enough that it is worthwhile logging this to aid in debugging.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A.
Integration Instructions
N/A.
</blockquote> <hr> </details>
-
aarch64: Update Comments to Reflect UEFI Spec TTBR1 Language @os-d (#159)
Change Details
## Description
The UEFI spec 2.10 A section 2.3.6 explicitly disallows using TTBR1 in UEFI. This commit amends some future looking comments that believed this crate would use TTBR1.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A.
Integration Instructions
N/A.
</blockquote> <hr> </details>
-
Makefile.toml: Clean Coverage Artifacts Before Running Coverage @os-d (#155)
Change Details
## Description
cargo-llvm-cov automatically cleans coverage artifacts before running in order to have accurate coverage results. However, if --no-report is passed, it does not automatically clean the coverage artifacts.
--no-report was added to cargo-llvm-cov when refactoring the report output, but a call to cargo llvm-cov clean first was not done. This is fine for CI builds, but for local runs, it will produce inaccurate coverage if there are existing coverage artifacts.
This fixes that by ensuring cargo llvm-cov clean is called first.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Cherry-picked from Patina.
Integration Instructions
N/A.
</blockquote> <hr> </details>
-
AArch64: Enforce Device Memory Must be Non-Executable @os-d (#154)
Change Details
## Description
The ARM ARM v8 section B2.7.2 states that setting any device memory as executable is a programming error. This has been confirmed by seeing crashes on physical platforms from seeing speculative execution attempt instruction fetches from device memory that was not ready to be read.
This enforces that device memory be marked NX.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Tested on physical ARM64 platform.
Integration Instructions
This is a breaking change because a previously accepted attribute combination no longer is. Patina prior to OpenDevicePartnership/patina#1032 being merged will fault on this patina-paging version for AArch64 platforms if callers were not setting NX themselves.
Because this was a breaking change in and of itself, another was embedded in this to add a new error type and repurpose an existing one. This requires no change in Patina.
Note: This is a breaking change, but is not required to be released immediately as Patina is working around this itself. A new patina-paging release will be deferred until something else requires it.
</blockquote> <hr> </details>
⚠️ Breaking Changes
-
Rename Uncacheable Attrs to Uncached @os-d (#156)
Change Details
## Description
This renames the Uncacheable and UncacheableExport attributes to Uncached and UncachedExport to better reflect they are set attributes, not capabilities, e.g. if a region is set as MemoryAttributes::Uncached it is uncached, not uncacheable.
UncachedExport was considered on being removed as it was for IA64, but as it is defined in the UEFI spec, the definition is left.
Note: patina-paging v10 is pending with another breaking change, so this is planned to be added to that, but not released yet until a need occurs. This was just done opportunistically to catch another breaking change before it was released.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A.
Integration Instructions
Update the names of the attributes.
</blockquote> <hr> </details>
🐛 Bug Fixes
-
Fix Large Page Remapping @os-d (#168)
Change Details
## Description
Currently, there is a bug when a large page is attempted to be remapped with the same attributes for a subset of the large page that is aligned on a large page boundary.
The mapping logic attempts to optimize this operation by not splitting the large page because it does not need to be. However, it does not progress the page table walk past the large page, so the logic continues down, sees if it can create a large page here, which it cannot because the size is too small, so it goes to the recursion logic, which is broken because we cannot recurse again when we are at a leaf level. We then write the page table entries to the actual PA, not into a page table.
This commit fixes this by advancing to the next iteration of the page table walk if we decide we have a valid large page that we don't need to split. In addition, a backstop is added in the recursion case to ensure that we never recurse if we have a valid leaf level page.
The other page table walking functions do not have this issue because they do not contain similar optimizations and only recurse if the entry is not a leaf level entry and is present.
A unit test is added for the specific failing case. Before this commit, it results in an access violation as we attempt to write to the PA (not mapped in the unit test) but passes with this commit.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Tested on an Intel physical platform experiencing the bug, Q35, SBSA, and unit tests.
Integration Instructions
N/A.
</blockquote> <hr> </details>
Full Changelog: v10.0.1...v11.0.0
v10.0.1
What's Changed
-
Chore: Update crate versions to 10.0.1 @[patina-automation[bot]](https://github.com/apps/patina-automation) (#146)
Change Details
An automatically created pull request to update the version of the repo due to a release.
-
Update to patina-devops v0.2.2 @Javagedes (#145)
Change Details
## Description
Updates the repository to patina-devops v0.2.2 which changes the release process as described in the release notes of patina-devops:
ref:
https://github.com/OpenDevicePartnership/patina-devops/releases/tag/v0.2.0- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
-
Update to patina-devops 0.1.1 @Javagedes (#143)
Change Details
## Description
Updates patina-devops to v0.1.1 which should result in a shorter PR Gate runtime.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
-
Makefile.toml: Clean up coverage command @Javagedes (#142)
Change Details
## Description
This commit cleans up the coverage commands by replacing the test command logic with the coverage-collect logic and having all coverage report generation rely on the test command instead. This allows us to remove test from the all command, which was previsouly building and running host based unit tests twice.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
-
Ignore patina automation bot PRs in release notes @os-d (#141)
Change Details
## Description
Do not show changes from patina-automation[bot].
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A.
Integration Instructions
N/A.
</blockquote> <hr> </details>
-
Update patina-devops to v0.0.4 @Javagedes (#140)
Change Details
## Description
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
-
chore: Release patina\_paging version 10.0.0 @os-d (#139)
Change Details
## Description
v10 was released
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A.
Integration Instructions
See release notes.
</blockquote> <hr> </details>
Full Changelog: v10.0.0...v10.0.1
v10.0.0
What's Changed
-
Code Coverage: Only post status to pull requests @cfernald (#138)
Change Details
## Description
This uses only_pulls which "Only post a status to pull requests, defaults to false. If true no status will be posted for commits not on a pull request."
see: https://docs.codecov.com/docs/commit-status#only_pulls
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
-
switch to nightly toolchain @Javagedes (#136)
Change Details
## Description
This commit switches the compiler to a nightly version dated one day past the 1.90 release date, rather then using the 1.90 release directly with RUSTC_BOOTSTRAP=1.
This change also removes all usage / reference of RUSTC_BOOTSTRAP=1 and resolves any new clippy / fmt errors.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
-
chore: Release patina\_paging version 9.0.3 @cfernald (#135)
Change Details
## Description
Release 9.0.3
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details>
⚠️ Breaking Changes
-
Remove PtResult @os-d (#137)
Change Details
## Description
This commit removes the PtResult type that was a wrapper over Result<T, PtError>. This does not provide added value, instead of using the standard Result type, consumers must use this new type.
Custom errors provide a lot of value, so PtError is left.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Tested with accompanying patina change booting Q35 and SBSA to Windows.
Integration Instructions
This is a breaking change because the external API has changed to
Resultinstead ofPtResult. Consumers should change to acceptResultinstead ofPtResult.</blockquote> <hr> </details>
Full Changelog: v9.0.3...v10.0.0
v9.0.3
What's Changed
-
Add codecov configuration @Javagedes (#134)
Change Details
## Description
This commit configures codecov with the following:
-
Delay codecov from sending status until all checks are finished
-
Rounds coverage percentage up or down to the nearest 2 decimal palces.
-
Updates the range so that less than 80% is red, 80-89% is yellow, and 90%+ is green
-
Sets the target coverage for the project and PR patch to 80% rather than keeping it approximitely what was before the commit.
-
Hardcodes the comment layout, though these are the default settings.
-
Impacts functionality?
-
Impacts security?
-
Breaking change?
-
Includes tests?
-
Includes documentation?
How This Was Tested
Ran the settings through the codecov validator.
Integration Instructions
N/A
-
-
Implement common stub page page\_allocator @cfernald (#133)
Change Details
## Description
Many consumers have defined their own stub page allocator that always fails to allocate pages in order to inspect existing pages tables. This can cause code bloat, as the page tables use generics and duplicate code may be generated for each unique stub allocator. This commit adds a common stub page allocator to the library itself, reducing code duplication.
Closes #131
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
Unit Tests
Integration Instructions
N/A
</blockquote> <hr> </details>
-
Switch to patina-devops @makubacki (#130)
Change Details
## Description
Call reusable workflows current in patina-devops to reduce CI related overhead in this repo.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
- PR CI workflows
Integration Instructions
- N/A
-
CIWorkflow.yml: multiple bugfixes / cleanup @Javagedes (#129)
Change Details
## Description
This PR does the following:
-
Adds
alphato the cargo release dry run step so that we always bump the version. This is necessary ascargo releaseattempts to do a dry run with the current release in the Cargo.toml, which conflicts because it already exists. -
Removes the usage and requirements of the crates.io token. This had multiple issues: (1) Someone with a branch on this repository edit the CI workflow and use the crates.io token however they wanted. (2) It caused CI to fail on branches from forks, as we marked the secret as required and, and secrets are not shared to forks.
-
Removes the editing of some of the rust config files with the metadata we needed to be able to download crates from azure crates for running CI.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
N/A
Integration Instructions
N/A
</blockquote> <hr> </details> -
🐛 Bug Fixes
-
Flush self-map TLB entries when unmapping large pages. @cfernald (#132)
Change Details
## Description
When a large page is mapped, there technically exists a self-map mapping to the physical address of the large page. This should not be used, but it can be pulled in by speculative execution. Therefore, when unmapping a large page, we need to flush the self-map TLB entries for that region similar to how it is flushed for splits.
Additionally, this commit splits the logic out for re-use and explicitly checks for >2mb pages, since those could have multiple layers of self-map VAs. In such cases, the entire TLB will be flushed.
Change Impact
This pull-request resolves two potential issues.
- When re-using memory previously used by a large page, the page tables are not being set correctly, causing unexpected faults accessing properly allocated memory.
- When splitting or reusing memory from 1Gb pages for 4kb pages, the page tables may not be setup correctly, causing faults accessing properly allocated memory.
Platforms should no longer see the above issues, and the TLB should be flushed more aggressively than previously, especially for platforms making frequently changes to 1Gb mappings.
- Impacts functionality?
- Impacts security?
- Breaking change?
- Includes tests?
- Includes documentation?
How This Was Tested
- Qemu
- Physical aarch64 platform
- Physical x64 platform
Integration Instructions
N/A
</blockquote> <hr> </details>
Full Changelog: v9.0.2...v9.0.3