0.1.3

shtaxxx released this 10 Jul 16:04

· 1960 commits to master since this release

fc441a8

Veriloggen 0.1.3

Test code by using Pytest
FSM library (lib.FSM) is updated
Bit selection ([X:Y], [X]) operation is supported
Bit concatenation (Cat) is supported
Explicit function statement generation is supported

Assets 2