Port iris.x.all_to_all to Gluon with sweep benchmark, scatter plot, and assembly report#417
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Port iris.x.all_to_all to Gluon with sweep benchmark, scatter plot, and assembly report#417
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…hmark Co-authored-by: mawad-amd <112003944+mawad-amd@users.noreply.github.com>
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[WIP] Port iris.x all to all from triton to gluon
Port iris.x.all_to_all to Gluon
Mar 4, 2026
Co-authored-by: mawad-amd <112003944+mawad-amd@users.noreply.github.com>
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changed the title
Port iris.x.all_to_all to Gluon
Port iris.x.all_to_all to Gluon with sweep benchmark, scatter plot, and assembly report
Mar 4, 2026
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Ports
iris.x.all_to_allto a Gluon (@gluon.jit) backend and adds infrastructure to validate correctness, benchmark at scale, and compare generated assembly between the two backends.New primitive —
iris.x.all_to_all_gluoniris/x/all_to_all.py: addsall_to_all_gluon, a@gluon.jittile-level all-to-all usingIrisDeviceCtxiris.xwhen Gluon is available (_GLUON_ALL_TO_ALL_AVAILABLEguard)range(first, last+1)range(world_size)— fully unrolled (constexpr)gl.BlockedLayout([1],[64],[4],[0])iris.load(ptr, cur_rank, src_rank, heap_bases, mask)ctx.load(ptr, src_rank, mask)Validation
tests/x/test_all_to_all_gluon.py: correctness againstdist.all_to_allacross 5 shapes × 3 dtypes (fp16/fp32/bf16)Benchmark & analysis tooling
benchmark/ccl/all_to_all/benchmark_x.py— extended with:--sweep: iterates 14(M, N_per_rank)configs from 128×64 to 16384×256--dump_asm: compiles both kernels and writes AMDGCN ISA to.asmfiles (reports VGPR count and spill count per backend)benchmark/ccl/all_to_all/plot_x_all_to_all.py— new scatter plot script:(M×N)dimensions; also prints a plain-text tabledocs/reference/gluon/all_to_all_report.md— technical report covering algorithm differences, assembly analysis methodology (VGPR, spills, vectorisation width, branch reduction), and how to reproduce resultsOriginal prompt
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