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March 25, 2026 17:40
- Update SDMA device primitives and anvil transport layer - Add collective framework base classes (topology detector, algorithm selector) - Update shmem API and symmetric memory registration - Update build system (CMakeLists, setup.py)
- Oneshot AllGather with registered output buffer support - Async AllGather (start_async/wait_async) with monotonic flag sync - Segmented AllGather with pre-allocated metadata buffers - Oneshot All2All with async support - Range-based registered buffer lookup for zero-copy SDMA writes
- Twoshot AllReduce: ReduceScatter + AllGather via SDMA - Async AllReduce with split PUT/WAIT phases - Support bf16/fp16/fp32/uint32 dtypes - Intra-node executors - Intra-node allreduce with CU-based reduction
- Pybind11 bindings for AllGather, All2All, AllReduce SDMA classes - Python AllgatherSdma/All2allSdma/AllreduceSdma wrappers - Support any dtype via uint32 reinterpretation - Register/deregister output buffers and async API from Python
- AllGather, All2All, AllReduce C++ examples and benchmarks - SDMA bandwidth benchmark (sdma_bw_allgather) - Intra-node example/benchmarks - Python test suites: allgather, all2all, allreduce, async, overlap - RCCL comparison benchmark
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This PR merges intra-node collective communication (CCL) over SDMA into main. It extends the existing shmem / anvil stack with device-side SDMA PUTs, symmetric memory registration, and completion synchronization, and adds AllGather, All2All, and AllReduce (including async) with C++ implementations, Python bindings, examples, and tests.