arch/arm/src/stm32/stm32_spi: chunk DMA exchanges to honor 16-bit NDTR

[cjj66619]

Summary

STM32 DMA NDTR / CNDTR is 16 bits wide on every supported series
(IPv1 CNDTR on F0/F1/F3/G4/L0/L1/L4, IPv2 SxNDTR on F2/F4/F7/H7).
spi_exchange()'s DMA path forwarded the full nwords to
stm32_dmasetup(), so a single SPI_EXCHANGE() of >= 65536 words
programmed NDTR to (nwords & 0xffff). For an exact 64 KiB transfer
(flash erase block, FAT cluster, common DMA staging buffer) the count
becomes zero, the stream completes instantly with no TC interrupt,
and the caller deadlocks in spi_dmarxwait().

Repro on any STM32 board with CONFIG_STM32_SPI{n}_DMA=y and a SPI
flash behind drivers/mtd/w25.c:

char buf[65536];
read(open("/dev/w25", O_RDONLY), buf, sizeof buf);   /* hangs forever */

This patch walks the request in chunks of at most 65535 words inside the
existing DMA branch of spi_exchange(), reusing the existing
spi_dma{rx,tx}{setup,start,wait}() sequence per chunk. Single-descriptor
transfers (every in-tree caller today) are byte-for-byte identical;
previously-deadlocking transfers now succeed. Fixes drivers/mtd/w25.c,
drivers/mmcsd/mmcsd_spi.c and any user of SPI_EXCHANGE() /
SPI_RECVBLOCK() / SPI_SNDBLOCK() with >= 64 KiB buffers.

Testing

STM32F407VGT6 + W25Q128 over SPI1 (SCK 42 MHz, MODE3), NuttX 12.x +
LittleFS. Bench tool: apps/examples/w25bench (in-tree NSH builtin),
each iteration loops internally for a >= 256 KiB timed window.

Without this patch: --size=64k and --size=1m block indefinitely in
spi_dmarxwait(); 60 s watchdog fires.

With this patch:

nsh> w25bench --op=read --size=4k --iters=20
[w25bench] poll read  size=4k  iters=20 inner=64  med= 50000 us  rng=[ 50000.. 50000] us  KB/s med=5120.00 best=5120.00
nsh> w25bench --op=read --size=64k --iters=10
[w25bench] poll read  size=64k iters=10 inner=4   med= 50000 us  rng=[ 50000.. 50000] us  KB/s med=5120.00 best=5120.00
nsh> w25bench --op=read --size=1m --iters=5
[w25bench] poll read  size=1m  iters=5  inner=1   med=200000 us  rng=[200000..200000] us  KB/s med=5120.00 best=5120.00

All three sizes saturate at 5120 KB/s ≈ 97.5% of SCK/8; the literal
poll is a hard-coded w25bench label, the actual path is
CONFIG_STM32_SPI1_DMA=y + this patch (label fix in a follow-up).

• git apply --check on apache/nuttx@e05292f9da — clean
• tools/checkpatch.sh -f + tools/nxstyle on the touched file — clean
• make stm32f4discovery:nsh default and with STM32_SPI1_DMA=y forced
  on — builds, no new warnings.

No H7 / F0 / F1 hardware on hand. The fix is IP-agnostic (both CNDTR
and SxNDTR are 16-bit per the RMs); a smoke build on those would be
appreciated.

Signed-off-by: Jinji Cui 113000688+cjj66619@users.noreply.github.com

[linguini1]

Hi! Could you remove the leftover template text from your PR description and include a log from your test?

Also, the commit message can just be a small summary, with most of the detail in the PR description. Just a nitpick though!

[cjj66619]

Hi! Could you remove the leftover template text from your PR description and include a log from your test?

Also, the commit message can just be a small summary, with most of the detail in the PR description. Just a nitpick though!

OK，Thank you for the suggestion!