embassy-mcxa: Enable ADRSTALL to avoid drop byte on i2c target.#6437
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GBJin wants to merge 1 commit into
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embassy-mcxa: Enable ADRSTALL to avoid drop byte on i2c target.#6437GBJin wants to merge 1 commit into
GBJin wants to merge 1 commit into
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felipebalbi
approved these changes
Jul 8, 2026
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MCXA platform intermittently fails to apply reports, and in the worst case the keyboard is dead.

Root cause: I²C target first-byte drop on the MCXA LPI2C block due to short SCL low span.
SCL stay low for 1.9 us after address match, data drops the first byte.
Enable ADRSTALL (SCFGR1 bit 0, "Address SCL Stall"), refer to MCXAP172M240F70RM_Rev1.pdf section47 LPI2C

This bit is equivalent to SLVPENDING for imxrt platform.
Target will hold SCL low after the address match until MCU reads SASR.

SCL low stretch to 708 us, ready to receive the first byte