Initial Verilator Support #3
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the blinky project. Things to add or fix: use the command-line info to set the VCD filename, add lint support, work out how to remove the verilator lint_off WIDTH comments in blinky.v.
Added files and blinky.core to support the ULX3S FPGA development board.
olofk
reviewed
Dec 17, 2018
| verilator_tb: | ||
| files: | ||
| - bench/blinky_tb.cpp : {file_type : cppSource} | ||
| - bench/testb.h : {file_type : user} |
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This should be specified as {file_type : cppSource, is_include_file : true} so that the backend knows to include the directory of the file in the include path
| tools: | ||
| verilator: | ||
| verilator_options : [--trace] | ||
| parameters : [clk_freq_hz=10000] |
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I just checked that VCD generation works just fine if you create a new parameter (by adding an entry under the parameters section near the end of the core file) that looks like this
vcd:
datatype : bool
paramtype : plusarg
add then add the newly created vcd parameter to the list of parameters for the target (i.e. change the line above to parameters : [clk_freq_hz=10000, vcd]
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| always @(posedge clk) begin | ||
| count <= count + 1; | ||
| /* verilator lint_off WIDTH */ |
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I will add a proper fix for this
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Here is an initial version which provides Verilator support. I'm not recommending that you adopt it as-is, but perhaps you can look at it and see how it can be modified to be acceptable. Thanks!
Things to add or fix: use the command-line info to set the VCD filename, add lint support, work out how to remove the verilator lint_off WIDTH comments in blinky.v.