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dsharlet
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dsharlet
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Add neon kernels for f32 <-> bf16 vcvt. I've generally followed the fp16 pattern here. For fp32->bf16, use neonbf16 where available, otherwise fall back to neon w/ explicit rounding handling. For bf16->fp32, just shift.
The manual rounding logic is less than half throughput compared to feat_bf16, but I figure it's worth it as bf16 doesn't have many fraction bits. Also, note that the scalar kernels are getting auto-vectorized well on M4 (confirmed via disasm), hence the negligible difference between neon without feat_bf16 and scalar.
On the rounding logic, there is an existing edge case where fp32 NaNs with 7 upper fraction bits unset get promoted to infs. I fixed this in the math.h function that the scalar kernels call.
Benchmarks
Comparison to fp16 kernels is given for reference.
M4 Max
Cortex-X1 (Pixel 7 Pro)