[RVV] add rvv f32 kernels for vcos,vexp,vlog,vsigmoid,vsin,vtanh#9926
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[RVV] add rvv f32 kernels for vcos,vexp,vlog,vsigmoid,vsin,vtanh#9926ken-unger wants to merge 1 commit intogoogle:masterfrom
ken-unger wants to merge 1 commit intogoogle:masterfrom
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ken-unger
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Apr 9, 2026
| vp = __riscv_vfmul(vx, vp, vl); | ||
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| // Evaluate the denominator polynomial q. | ||
| vfloat32m1_t vq = __riscv_vfadd(__riscv_vfmul(vx2, vbeta_4, vl), vbeta_2, vl); |
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Unfortunately RVV doesn't have a vfmadd that allows for addition of a scalar, which would have been useful here and many other places in this PR. One can only add a vector, but then you waste vector registers. So, as a result I've kept this as vfadd/vfmul allowing this (and similarly other kernels) to get to LMUL=8.
ken-unger
commented
Apr 9, 2026
| #include "src/xnnpack/common.h" | ||
| #include "src/xnnpack/microparams.h" | ||
| #include "src/xnnpack/vunary.h" | ||
| #include "src/xnnpack/simd/f32-scalar.h" // xnn_f32_i32_t |
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I considered moving xnn_f32_i32_t somewhere common ... but wasn't sure the right place, so left it where it was.
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@fbarchard and @dsharletg please review when you are able. Thank you. |
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Add rvv kernels for f32-vcos, f32-vexp, f32-vlog, f32-vsigmoid, f32-vsin, f32-vtanh.
Most of this is a simple translation of the simd versions to the rvv implementation.
Tested on qemu & bpi-f3.
Results on bpi-f32 running operator-unary-bench. Generally a ~10x improvement over the previous scalar version.