Fully support RTLIL cell and wire attributes

.clangd

@@ -1,5 +1,21 @@
-CompileFlags:
-  CompilationDatabase: ./circt/build
-Diagnostics:
-  Suppress: 
-    - "misc-definitions-in-headers"
+If:
+  PathMatch: "rtlil-emit/*"
+  CompileFlags:
+    CompilationDatabase: "rtlil-emit/build"
+
+---
+
+If:
+  PathMatch: "circt/*"
+  CompileFlags:
+    CompilationDatabase: "circt/build"
+  Diagnostics:
+    Suppress:
+      - "misc-definitions-in-headers"
+
+---
+
+If:
+  PathMatch: "circt/llvm/*"
+  CompileFlags:
+    CompilationDatabase: "circt/llvm/build"

.gitignore

@@ -1 +1,3 @@
-rtlil-emit/build
+rtlil-emit/build
+rtlil-emit/.cache
+.direnv

.gitmodules

@@ -1,3 +1,3 @@
 [submodule "circt"]
 	path = circt
-	url = [email protected]:hm-aemy/circt.git
+	url = [email protected]:widlarizer/circt.git

build.sh

@@ -1,31 +1,25 @@
-#LLVM
+set -euo pipefail
 
-mkdir -p ./circt/llvm/build;
-pushd ./circt/llvm/build;
-cmake -G Ninja ../llvm \
+#LLVM
+mkdir -p ./circt/llvm/build
+cmake -S ./circt/llvm/llvm -B ./circt/llvm/build -G Ninja \
   -DLLVM_ENABLE_PROJECTS="mlir"  \
   -DLLVM_TARGETS_TO_BUILD="host"   \
   -DLLVM_ENABLE_ASSERTIONS=ON  \
   -DCMAKE_BUILD_TYPE=DEBUG   \
   -DLLVM_USE_SPLIT_DWARF=ON   \
   -DLLVM_ENABLE_LLD=ON \
   -DLLVM_PARALLEL_LINK_JOBS=1 \
-  -DLLVM_PARALLEL_COMPILE_JOBS=16 \
-  -DLLVM_OPTIMIZED_TABLEGEN=ON;
-ninja;
-popd;
+  -DLLVM_OPTIMIZED_TABLEGEN=ON \
+  -DLLVM_CCACHE_BUILD=ON
+ninja -C ./circt/llvm/build
 
 #CIRCT
-mkdir -p ./circt/build;
-pushd ./circt/build;
-cmake .. --preset debug;
-ninja;
-popd;
+mkdir -p ./circt/build
+cmake -S ./circt -B ./circt/build --preset debug
+ninja -C ./circt/build
 
 #rtlil-emit
-
-mkdir -p ./rtlil-emit/build;
-pushd ./rtlil-emit/build;
-cmake .. --preset debug;
-ninja;
-popd;
+mkdir -p ./rtlil-emit/build
+cmake -S ./rtlil-emit -B ./rtlil-emit/build --preset debug
+ninja -C ./rtlil-emit/build;

flake.nix

@@ -18,14 +18,13 @@
           clang-yosys
           clang-tools_19
           clang_19
-          lld
+          llvmPackages.bintools
           llvm
           cmake
           gnumake
           ninja
         ];
         shellHook = ''
-          export LD_LIBRARY_PATH="${pkgs.stdenv.cc.cc.lib}/lib:${pkgs.zlib}/lib:$LD_LIBRARY_PATH";
           export PATH=$PWD/circt/build/bin:$PATH;
         '';
       };

nix/overlay.nix

@@ -7,16 +7,19 @@ final: prev: rec {
     }).overrideAttrs
       (
         finalAttrs: previousAttrs: {
-          version = "0.55";
+          version = "0.57";
           src = prev.fetchFromGitHub {
             owner = "YosysHQ";
             repo = "yosys";
-            tag = "v${finalAttrs.version}";
-            hash = "sha256-GddNbAtH5SPm7KTa5kCm/vGq4xOczx+jCnOSQl55gUI=";
+            rev = "83fa0448107e31360393366ba4bef15a713ba5f4";
+            hash = "sha256-FZ1h3p0NS3W/eqHgROvpOdib73qX+gsUGwGYJUA9uVg=";
             fetchSubmodules = true;
             leaveDotGit = true;
             inherit (previousAttrs.src) postFetch; # Preserve the postFetch script
           };
+          patches = [
+            (builtins.elemAt previousAttrs.patches 1)
+          ];
           doCheck = false;
           makeFlags = previousAttrs.makeFlags ++ [
             "ENABLE_ABC=0"

rtlil-emit/CMakeLists.txt

@@ -43,6 +43,7 @@ set(LIBS
         ${dialect_libs}
         ${conversion_libs}
         CIRCTRTLIL
+        CIRCTExportVerilog
         MLIRAnalysis
         MLIRCallInterfaces
         MLIRCastInterfaces
@@ -75,7 +76,7 @@ execute_process(
     OUTPUT_STRIP_TRAILING_WHITESPACE
 )
 separate_arguments(YOSYS_LDFLAGS_LIST UNIX_COMMAND "${YOSYS_LDFLAGS}")
-separate_arguments(YOSYS_CXXFLAGS_LIST UNIX_COMMAND "${YOSYS_CXXFLAGS} -Wno-cast-qual")
+separate_arguments(YOSYS_CXXFLAGS_LIST UNIX_COMMAND "${YOSYS_CXXFLAGS} -Wno-cast-qual -Wno-unused-parameter")
 add_compile_options(${YOSYS_CXXFLAGS_LIST})
 set(LLVM_REQUIRES_EH ON)
 # add_llvm_executable(rtlil-opt rtlil-opt.cpp)