@@ -445,7 +445,16 @@ namespace IGC
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SIMD_SKIP_ML, // 8: skip this SIMD due to ML engine prediction.
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SIMD_FORCE_CONTENT, // 9: force this simd due to shader content (simd32 if WaveActive, barriers + interlocks)
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SIMD_FORCE_HINT, // 10: force this simd by hint(s) (now for WaveSize only)
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- SIMD_INFO_RESERVED // 11: *** If new entry is added, make sure it still fits in each m_SIMDInfo Ex:m_simd8_SIMDInfo ***
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+ SIMD_INFO_RESERVED // 11: *** If new entry is added, make sure it still fits in m_SIMDInfo ***
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+ };
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+
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+ enum SIMDInfoOffset
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+ {
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+ SIMD8_OFFSET = 0 ,
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+ SIMD16_OFFSET = SIMD_INFO_RESERVED,
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+ SIMD32_OFFSET = SIMD_INFO_RESERVED*2 ,
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+ DUAL_SIMD8_OFFSET = SIMD_INFO_RESERVED * 3 ,
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+ QUAD_SIMD8_DYNAMIC_OFFSET = SIMD_INFO_RESERVED*6 ,
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};
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struct SKernelProgram
@@ -483,11 +492,7 @@ namespace IGC
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SSimplePushInfo simplePushInfoArr[g_c_maxNumberOfBufferPushed];
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- uint32_t simd8_SIMDInfo = 0 ;
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- uint32_t simd16_SIMDInfo = 0 ;
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- uint32_t simd32_SIMDInfo = 0 ;
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- uint32_t dual_simd8_SIMDInfo = 0 ;
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- uint32_t quad_simd8_dynamic_SIMDInfo = 0 ;
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+ uint64_t SIMDInfo = 0 ;
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void * m_StagingCtx;
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bool m_RequestStage2;
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};
@@ -1013,11 +1018,7 @@ namespace IGC
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std::vector<int > m_gsNonDefaultIdxMap;
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std::vector<int > m_psIdxMap;
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DWORD LtoUsedMask = 0 ;
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- uint32_t m_simd8_SIMDInfo = 0 ;
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- uint32_t m_simd16_SIMDInfo = 0 ;
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- uint32_t m_simd32_SIMDInfo = 0 ;
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- uint32_t m_dual_simd8_SIMDInfo = 0 ;
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- uint32_t m_quad_simd8_dynamic_SIMDInfo = 0 ;
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+ uint64_t m_SIMDInfo = 0 ;
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uint32_t HdcEnableIndexSize = 0 ;
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std::vector<RoutingIndex> HdcEnableIndexValues;
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@@ -1063,7 +1064,7 @@ namespace IGC
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const bool createResourceDimTypes = true ,
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LLVMContextWrapper* LLVMContext = nullptr )// /< LLVM context to use, if null a new one will be created
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: type(_type), platform(_platform), btiLayout(_bitLayout), m_DriverInfo(driverInfo),
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- llvmCtxWrapper (LLVMContext)
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+ llvmCtxWrapper (LLVMContext), m_SIMDInfo( 0 )
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{
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if (llvmCtxWrapper == nullptr )
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{
@@ -1165,63 +1166,57 @@ namespace IGC
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bool isSWSubTriangleOpacityCullingEmulationEnabled () const ;
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- enum Action { Set, Clear };
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-
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- // ModifySIMDInfo is used by both Set and ClearSIMDInfo. Since Clear function doesn't have bit information, it defaults
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- // to SIMD_INFO_RESERVED if the argument is not passed. bit will not be used when action is Action::clear
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- void ModifySIMDInfo (SIMDMode simd, ShaderDispatchMode mode, Action action, SIMDInfoBit bit = SIMD_INFO_RESERVED)
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+ unsigned int GetSIMDInfoOffset (SIMDMode simd, ShaderDispatchMode mode)
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{
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- uint32_t bit_value = 1UL << bit;
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- bool clear = action == Action::Clear ? true : false ;
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- switch (mode)
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- {
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+ unsigned int offset = 0 ;
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+
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+ switch (mode) {
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case ShaderDispatchMode::NOT_APPLICABLE:
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- switch (simd)
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- {
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+ switch (simd) {
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case SIMDMode::SIMD8:
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- m_simd8_SIMDInfo = clear ? 0 : m_simd8_SIMDInfo | bit_value ;
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+ offset = SIMD8_OFFSET ;
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break ;
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case SIMDMode::SIMD16:
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- m_simd16_SIMDInfo = clear ? 0 : m_simd16_SIMDInfo | bit_value ;
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+ offset = SIMD16_OFFSET ;
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break ;
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case SIMDMode::SIMD32:
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- m_simd32_SIMDInfo = clear ? 0 : m_simd32_SIMDInfo | bit_value ;
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+ offset = SIMD32_OFFSET ;
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break ;
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default :
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- IGC_ASSERT_MESSAGE (0 , " Unknown SIMD Mode" );
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break ;
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}
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break ;
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case ShaderDispatchMode::DUAL_SIMD8:
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- m_dual_simd8_SIMDInfo = clear ? 0 : m_dual_simd8_SIMDInfo | bit_value ;
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+ offset = DUAL_SIMD8_OFFSET ;
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break ;
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case ShaderDispatchMode::QUAD_SIMD8_DYNAMIC:
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- m_quad_simd8_dynamic_SIMDInfo = clear ? 0 : m_quad_simd8_dynamic_SIMDInfo | bit_value ;
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+ offset = QUAD_SIMD8_DYNAMIC_OFFSET ;
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break ;
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default :
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- IGC_ASSERT_MESSAGE (0 , " Unknown SIMD Mode" );
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break ;
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}
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+ IGC_ASSERT (offset < 64 );
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+ return offset;
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}
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void SetSIMDInfo (SIMDInfoBit bit, SIMDMode simd, ShaderDispatchMode mode)
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{
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- IGC_ASSERT (bit < SIMD_INFO_RESERVED);
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- ModifySIMDInfo (simd, mode, Action::Set, bit);
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+ unsigned int offset = GetSIMDInfoOffset (simd, mode);
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+ unsigned int shift = bit + offset;
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+ IGC_ASSERT (shift < 64 );
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+ m_SIMDInfo |= 1ULL << shift;
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}
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void ClearSIMDInfo (SIMDMode simd, ShaderDispatchMode mode)
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{
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- ModifySIMDInfo (simd, mode, Action::Clear);
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+ unsigned int offset = GetSIMDInfoOffset (simd, mode);
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+ IGC_ASSERT (offset < 64 );
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+ m_SIMDInfo &= ~(0xffULL << offset);
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}
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- uint32_t GetSimd8SIMDInfo () const { return m_simd8_SIMDInfo; }
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- uint32_t GetSimd16SIMDInfo () const { return m_simd16_SIMDInfo; }
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- uint32_t GetSimd32SIMDInfo () const { return m_simd32_SIMDInfo; }
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- uint32_t GetDualSimd8SIMDInfo () const { return m_dual_simd8_SIMDInfo; }
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- uint32_t GetQuadSimd8DynamicSIMDInfo () const { return m_quad_simd8_dynamic_SIMDInfo; }
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+ uint64_t GetSIMDInfo () { return m_SIMDInfo; }
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SIMDMode GetSIMDMode () const ;
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