Skip to content

Commit ad9f7d4

Browse files
wanda-phijfng
authored andcommitted
Align Signature.create signature with current Amaranth.
This fixes fallout of amaranth-lang/amaranth#991. Fixes amaranth-lang#60.
1 parent 2b37115 commit ad9f7d4

File tree

3 files changed

+16
-16
lines changed

3 files changed

+16
-16
lines changed

amaranth_soc/csr/bus.py

+8-8
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,7 @@ def check_parameters(cls, width, access):
102102
except ValueError as e:
103103
raise ValueError(f"{access!r} is not a valid Element.Access") from e
104104

105-
def create(self, *, path=()):
105+
def create(self, *, path=None, src_loc_at=0):
106106
"""Create a compatible interface.
107107
108108
See :meth:`wiring.Signature.create` for details.
@@ -111,7 +111,7 @@ def create(self, *, path=()):
111111
-------
112112
An :class:`Element` object using this signature.
113113
"""
114-
return Element(self.width, self.access, path=path)
114+
return Element(self.width, self.access, path=path, src_loc_at=1 + src_loc_at)
115115

116116
def __eq__(self, other):
117117
"""Compare signatures.
@@ -144,8 +144,8 @@ def __repr__(self):
144144
------
145145
See :meth:`Element.Signature.check_parameters`
146146
"""
147-
def __init__(self, width, access, *, path=()):
148-
super().__init__(Element.Signature(width=width, access=access), path=path)
147+
def __init__(self, width, access, *, path=None, src_loc_at=0):
148+
super().__init__(Element.Signature(width=width, access=access), path=path, src_loc_at=1 + src_loc_at)
149149

150150
@property
151151
def width(self):
@@ -254,7 +254,7 @@ def check_parameters(cls, *, addr_width, data_width):
254254
if not isinstance(data_width, int) or data_width <= 0:
255255
raise TypeError(f"Data width must be a positive integer, not {data_width!r}")
256256

257-
def create(self, *, path=()):
257+
def create(self, *, path=None, src_loc_at=0):
258258
"""Create a compatible interface.
259259
260260
See :meth:`wiring.Signature.create` for details.
@@ -265,7 +265,7 @@ def create(self, *, path=()):
265265
"""
266266
return Interface(addr_width=self.addr_width, data_width=self.data_width,
267267
memory_map=self._memory_map, # if None, do not raise an exception
268-
path=path)
268+
path=path, src_loc_at=1 + src_loc_at)
269269

270270
def __eq__(self, other):
271271
"""Compare signatures.
@@ -313,10 +313,10 @@ class Interface(wiring.PureInterface):
313313
------
314314
See :meth:`Signature.check_parameters`.
315315
"""
316-
def __init__(self, *, addr_width, data_width, memory_map=None, path=()):
316+
def __init__(self, *, addr_width, data_width, memory_map=None, path=None, src_loc_at=0):
317317
sig = Signature(addr_width=addr_width, data_width=data_width)
318318
sig.memory_map = memory_map
319-
super().__init__(sig, path=path)
319+
super().__init__(sig, path=path, src_loc_at=1 + src_loc_at)
320320

321321
@property
322322
def addr_width(self):

amaranth_soc/event.py

+4-4
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ def check_parameters(cls, *, trigger):
8080
except ValueError as e:
8181
raise ValueError(f"{trigger!r} is not a valid Source.Trigger") from e
8282

83-
def create(self, *, path=()):
83+
def create(self, *, path=None, src_loc_at=0):
8484
"""Create a compatible interface.
8585
8686
See :meth:`wiring.Signature.create` for details.
@@ -91,7 +91,7 @@ def create(self, *, path=()):
9191
"""
9292
return Source(trigger=self.trigger,
9393
event_map=self._event_map, # if None, do not raise an exception
94-
path=path)
94+
path=path, src_loc_at=1 + src_loc_at)
9595

9696
def __eq__(self, other):
9797
"""Compare signatures.
@@ -121,10 +121,10 @@ def __repr__(self):
121121
------
122122
See :meth:`Source.Signature.check_parameters`.
123123
"""
124-
def __init__(self, *, trigger="level", event_map=None, path=()):
124+
def __init__(self, *, trigger="level", event_map=None, path=None, src_loc_at=0):
125125
sig = Source.Signature(trigger=trigger)
126126
sig.event_map = event_map
127-
super().__init__(sig, path=path)
127+
super().__init__(sig, path=path, src_loc_at=1 + src_loc_at)
128128

129129
@property
130130
def trigger(self):

amaranth_soc/wishbone/bus.py

+4-4
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,7 @@ def check_parameters(cls, *, addr_width, data_width, granularity, features):
205205
for feature in features:
206206
Feature(feature) # raises ValueError if feature is invalid
207207

208-
def create(self, *, path=()):
208+
def create(self, *, path=None, src_loc_at=0):
209209
"""Create a compatible interface.
210210
211211
See :meth:`wiring.Signature.create` for details.
@@ -217,7 +217,7 @@ def create(self, *, path=()):
217217
return Interface(addr_width=self.addr_width, data_width=self.data_width,
218218
granularity=self.granularity, features=self.features,
219219
memory_map=self._memory_map, # if None, do not raise an exception
220-
path=path)
220+
path=path, src_loc_at=1 + src_loc_at)
221221

222222
def __eq__(self, other):
223223
"""Compare signatures.
@@ -262,11 +262,11 @@ class Interface(wiring.PureInterface):
262262
See :meth:`Signature.check_parameters`.
263263
"""
264264
def __init__(self, *, addr_width, data_width, granularity=None, features=frozenset(),
265-
memory_map=None, path=()):
265+
memory_map=None, path=None, src_loc_at=0):
266266
signature = Signature(addr_width=addr_width, data_width=data_width,
267267
granularity=granularity, features=features)
268268
signature.memory_map = memory_map
269-
super().__init__(signature, path=path)
269+
super().__init__(signature, path=path, src_loc_at=1 + src_loc_at)
270270

271271
@property
272272
def addr_width(self):

0 commit comments

Comments
 (0)