@@ -3160,3 +3160,58 @@ firrtl.circuit "NonPropertyTypeInDomainField" {
31603160 firrtl.domain @Foo [" bar" , !firrtl.uint <1 >]
31613161 firrtl.module @NonPropertyTypeInDomainField () {}
31623162}
3163+
3164+ // -----
3165+
3166+ firrtl.circuit " WrongInstanceDomainInfo" {
3167+ firrtl.domain @ClockDomain
3168+ // expected-note @below {{original module declared here}}
3169+ firrtl.module @Foo (in %a: !firrtl.uint <1 >) {}
3170+ firrtl.module @WrongInstanceDomainInfo () {
3171+ // expected-error @below {{'firrtl.instance' op has a wrong number of port domain info attributes; expected 1, got 0}}
3172+ %a = firrtl.instance foo {domainInfo = []} @Foo (in a : !firrtl.uint <1 >)
3173+ }
3174+ }
3175+
3176+ // -----
3177+
3178+ firrtl.circuit " WrongInstanceDomainInfo" {
3179+ firrtl.domain @ClockDomain
3180+ // expected-note @below {{original module declared here}}
3181+ firrtl.module @Foo (
3182+ in %A : !firrtl.domain of @ClockDomain ,
3183+ in %B : !firrtl.domain of @ClockDomain ,
3184+ in %a : !firrtl.uint <1 > domains [%A ]
3185+ ) {}
3186+ firrtl.module @WrongInstanceDomainInfo () {
3187+ // expected-error @below {{op domain info for "a" must be [0 : ui32], but got [1 : ui32]}}
3188+ %foo_A , %foo_B , %foo_a = firrtl.instance foo @Foo (
3189+ in A : !firrtl.domain of @ClockDomain ,
3190+ in B : !firrtl.domain of @ClockDomain ,
3191+ in a : !firrtl.uint <1 > domains [B ]
3192+ )
3193+ }
3194+ }
3195+
3196+ // -----
3197+
3198+ firrtl.circuit " WrongInstanceChoiceDomainInfo" {
3199+ firrtl.option @Platform {
3200+ firrtl.option_case @FPGA
3201+ }
3202+ firrtl.domain @ClockDomain
3203+ // expected-note @below {{original module declared here}}
3204+ firrtl.module @Foo (
3205+ in %A : !firrtl.domain of @ClockDomain ,
3206+ in %B : !firrtl.domain of @ClockDomain ,
3207+ in %a : !firrtl.uint <1 > domains [%A ]
3208+ ) {}
3209+ firrtl.module @WrongInstanceChoiceDomainInfo () {
3210+ // expected-error @below {{op domain info for "a" must be [0 : ui32], but got [1 : ui32]}}
3211+ %foo_A , %foo_B , %foo_a = firrtl.instance_choice foo @Foo alternatives @Platform { @FPGA -> @Foo } (
3212+ in A : !firrtl.domain of @ClockDomain ,
3213+ in B : !firrtl.domain of @ClockDomain ,
3214+ in a : !firrtl.uint <1 > domains [B ]
3215+ )
3216+ }
3217+ }
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