@@ -232,12 +232,11 @@ struct SrcState {
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bool operator !=(const SrcState &RHS) const { return !((*this ) == RHS); }
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};
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- static void
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- printLastInsts (raw_ostream &OS,
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- ArrayRef<SmallPtrSet<const MCInst *, 4 >> LastInstWritingReg) {
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+ static void printInstsShort (raw_ostream &OS,
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+ ArrayRef<SmallPtrSet<const MCInst *, 4 >> Insts) {
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OS << " Insts: " ;
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- for (unsigned I = 0 ; I < LastInstWritingReg .size (); ++I) {
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- auto &Set = LastInstWritingReg [I];
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+ for (unsigned I = 0 ; I < Insts .size (); ++I) {
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+ auto &Set = Insts [I];
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OS << " [" << I << " ](" ;
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for (const MCInst *MCInstP : Set)
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OS << MCInstP << " " ;
@@ -252,7 +251,7 @@ raw_ostream &operator<<(raw_ostream &OS, const SrcState &S) {
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} else {
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OS << " SafeToDerefRegs: " << S.SafeToDerefRegs << " , " ;
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OS << " TrustedRegs: " << S.TrustedRegs << " , " ;
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- printLastInsts (OS, S.LastInstWritingReg );
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+ printInstsShort (OS, S.LastInstWritingReg );
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}
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OS << " >" ;
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return OS;
@@ -281,7 +280,7 @@ void SrcStatePrinter::print(raw_ostream &OS, const SrcState &S) const {
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OS << " , TrustedRegs: " ;
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RegStatePrinter.print (OS, S.TrustedRegs );
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OS << " , " ;
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- printLastInsts (OS, S.LastInstWritingReg );
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+ printInstsShort (OS, S.LastInstWritingReg );
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}
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OS << " >" ;
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}
@@ -754,7 +753,7 @@ SrcSafetyAnalysis::create(BinaryFunction &BF,
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struct DstState {
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// / The set of registers whose values cannot be inspected by an attacker in
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// / a way usable as an authentication oracle. The results of authentication
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- // / instructions should be written to such registers.
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+ // / instructions should only be written to such registers.
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BitVector CannotEscapeUnchecked;
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std::vector<SmallPtrSet<const MCInst *, 4 >> FirstInstLeakingReg;
@@ -772,6 +771,9 @@ struct DstState {
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return (*this = StateIn);
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CannotEscapeUnchecked &= StateIn.CannotEscapeUnchecked ;
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+ for (unsigned I = 0 ; I < FirstInstLeakingReg.size (); ++I)
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+ for (const MCInst *J : StateIn.FirstInstLeakingReg [I])
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+ FirstInstLeakingReg[I].insert (J);
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return *this ;
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}
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@@ -780,7 +782,8 @@ struct DstState {
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bool empty () const { return CannotEscapeUnchecked.empty (); }
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bool operator ==(const DstState &RHS) const {
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- return CannotEscapeUnchecked == RHS.CannotEscapeUnchecked ;
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+ return CannotEscapeUnchecked == RHS.CannotEscapeUnchecked &&
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+ FirstInstLeakingReg == RHS.FirstInstLeakingReg ;
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}
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bool operator !=(const DstState &RHS) const { return !((*this ) == RHS); }
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};
@@ -790,7 +793,8 @@ raw_ostream &operator<<(raw_ostream &OS, const DstState &S) {
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if (S.empty ()) {
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OS << " empty" ;
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} else {
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- OS << " CannotEscapeUnchecked: " << S.CannotEscapeUnchecked ;
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+ OS << " CannotEscapeUnchecked: " << S.CannotEscapeUnchecked << " , " ;
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+ printInstsShort (OS, S.FirstInstLeakingReg );
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}
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OS << " >" ;
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return OS;
@@ -810,10 +814,13 @@ void DstStatePrinter::print(raw_ostream &OS, const DstState &S) const {
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OS << " dst-state<" ;
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if (S.empty ()) {
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assert (S.CannotEscapeUnchecked .empty ());
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+ assert (S.FirstInstLeakingReg .empty ());
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OS << " empty" ;
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} else {
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OS << " CannotEscapeUnchecked: " ;
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RegStatePrinter.print (OS, S.CannotEscapeUnchecked );
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+ OS << " , " ;
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+ printInstsShort (OS, S.FirstInstLeakingReg );
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}
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OS << " >" ;
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}
@@ -843,6 +850,7 @@ class DstSafetyAnalysis {
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const unsigned NumRegs;
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const TrackedRegisters RegsToTrackInstsFor;
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+
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// / Stores information about the detected instruction sequences emitted to
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// / check an authenticated pointer. Specifically, if such sequence is detected
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// / in a basic block, it maps the first instruction of that sequence to the
@@ -899,7 +907,6 @@ class DstSafetyAnalysis {
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const BitVector &LeakedRegs,
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const DstState &Cur) const {
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SmallVector<MCPhysReg> Regs;
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- const MCPhysReg NoReg = BC.MIB ->getNoRegister ();
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// A pointer can be checked, or
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if (auto CheckedReg =
@@ -913,7 +920,7 @@ class DstSafetyAnalysis {
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bool IsAuthenticated;
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MCPhysReg BranchDestReg =
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BC.MIB ->getRegUsedAsIndirectBranchDest (Inst, IsAuthenticated);
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- assert (BranchDestReg != NoReg );
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+ assert (BranchDestReg != BC. MIB -> getNoRegister () );
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if (!IsAuthenticated)
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Regs.push_back (BranchDestReg);
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}
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