All pull requests

Pull requests

• [AsmPrinter] Handle .cfi_rel_offset when emitting CFI instructions

  backend:AArch64llvm:codegen
  #239555·Il-Capitano opened Nov 6, 2026Contributor·

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  1

• [mlir][vector] Unroll transfers masked by vector.mask

  mlir:vectormlir:vectoropsmlir
  #239554·Vaisman opened Nov 6, 2026Contributor·

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  1

• [AMDGPU] Diagnose s_waitcnt builtin on archs that don't have it

  backend:AMDGPUclang:frontendclang
  #239553·ritter-x2a opened Nov 6, 2026Member·

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  1

• [Flang][NFC] Move code from header to .cpp

  #239552·Meinersbur opened Nov 6, 2026Member·

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• [InstCombine] Fix poison propagation in logical masked icmp fold

  #239551·nikic opened Nov 6, 2026Contributor·

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  2

• [X86] Add thorough vector.interleave/deinterleave test coverage

  backend:X86skip-precommit-approval
  #239549·RKSimon opened Nov 6, 2026Contributor·

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• [clang][bytecode][NFC] Remove canBeInitialized() checks

  clang:bytecodeclang:frontendclang
  #239548·tbaederr opened Nov 6, 2026Contributor·

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  1

• [MemDep] Avoid recursion in getNonLocalPointerDepFromBB

  llvm:analysisllvm:transforms
  #239547·mark-sed opened Nov 6, 2026Contributor·

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  5

• [SPARC] Remap the parameter DBG_VALUEs of a leaf procedure

  backend:Sparcdebuginfo
  #239545·shalseth opened Nov 6, 2026Contributor·

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  1

  1

• [ControlFlowUtils] Fix nullptr dereference in ControlFlowHub::finalize

  llvm:transforms
  #239542·jayfoad opened Nov 6, 2026Contributor·

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  2

• [AMDGPU] Fix StructizeCFG leaking flow's poison value into merge block's value

  llvm:transforms
  #239541·choikwa opened Nov 6, 2026Contributor·

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  1

• [clang][Lex][NFC] Share directory module map processing

  clang:frontendclang
  #239538·ChenMiaoi opened Nov 6, 2026Contributor·

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  1

• [MachineSink] Avoid quadratic compile time on deep CFG chains

  #239536·wsmoses opened Nov 6, 2026Member·

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• [RISCV] Update the getCSRCost from 5 to 32768

  #239534·BeMg opened Nov 6, 2026Contributor·4/4·

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• [IndVars] Expand exit values in the preheader

  llvm:transforms
  #239533·wangpc-pp opened Nov 6, 2026Contributor·

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  1

• [RISCV] Make enableCSRFirstTimeMinCost default true in RISC-V

  #239532·BeMg opened Nov 6, 2026Contributor·3/4·

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• [RegAlloc] Add enableCSRFirstTimeMinCost to let RegAlloc has more choice

  #239530·BeMg opened Nov 6, 2026Contributor·2/4·

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  1

• [AArch64] Ignore processor families for inlining

  backend:AArch64llvm:transforms
  #239528·maleadt opened Nov 6, 2026Contributor·

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  · LLVM 23.x Release
  6

• [SPARC] Do not silently ignore musttail

  backend:Sparc
  #239527·shalseth opened Nov 6, 2026Contributor·

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  1

  1

• [RISCV] Add pre-commit testcase

  #239526·BeMg opened Nov 6, 2026Contributor·1/4·

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• [Offload][Omp] Finish removing Plugin Interface from libomptarget

  offload
  #239525·adurang opened Nov 6, 2026Contributor·

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  2

• [AMDGPU] Avoid Align assertion in isUniformLoad

  backend:AMDGPU
  #239522·Shoreshen opened Nov 6, 2026Contributor·

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  1

• [RISCV] Handle PseudoMERGE in OptWInstrs.

  backend:RISC-V
  #239520·topperc opened Nov 6, 2026Contributor·

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  2

• [AMDGPU] Do not track TENSOR_SAVE/TENSOR_STOP with xcnt

  backend:AMDGPU
  #239519·vg0204 opened Nov 6, 2026Contributor·

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  3

  

• [DAGCombiner] Fix quadratic store-chain parallelization and merging

  #239518·wsmoses opened Nov 6, 2026Member·

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