opencomputeproject · nikitin-t · Feb 14, 2023
diff --git a/Gagarin/TiogaPass/LICENSE b/Gagarin/TiogaPass/LICENSE
@@ -0,0 +1,18 @@
+This software and associated documentation files (the "Software") are contributed to the
+Open Compute Project and are subject to the license terms of the Open Compute Project
+(OCP) Software Contributor License Agreement listed at the following address:
+https://www.opencompute.org/documents/software-contributor-license-agreement.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS
+OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+The Software incorporates third-party software listed below. The provisions contained in each
+such license apply only to the respective third-party software.
+
+1.      EDK2 (https://github.com/tianocore/edk2/blob/master/License.txt)
+2.      Intel microcode (https://github.com/tianocore/edk2-non-osi/blob/master/Silicon/Intel/PurleySiliconBinPkg/Microcode/IntelMicrocodeLicense.txt)
+3.      Intel FV binaries (https://github.com/tianocore/edk2-non-osi/blob/master/Silicon/Intel/PurleySiliconBinPkg/FV/License.txt)
diff --git a/Gagarin/TiogaPass/README.md b/Gagarin/TiogaPass/README.md
@@ -0,0 +1,100 @@
+# OCP Tioga Pass Open System Firmware
+
+## Features
+
+* Boot options: SATA, NVME, USB, PXE, HTTP
+* Boot methods: UEFI
+* Interfaces: VGA interface, GUI interface
+* Security features: TPM support, SecureBoot
+* IPMI (Onetime boot)
+
+## Build
+
+### Pre-requisites
+
+1. Windows 10
+2. Visual Studio 2015 SP3 (Community Edition or Developer Edition or Enterprise Edition)
+3. Python 3.7 (64 bit) and higher
+   * Add this to your path
+4. Python 2.7
+   * Install into `C:\Python27`
+5. ASL - http://www.acpica.org/
+   * Install into `C:\ASL`
+6. NASM - установлен в каталог **C:\NASM** - http://www.nasm.us/
+   * Install into `C:\NASM`
+
+### How To Build
+
+1. Into that folder, clone:
+
+```powershell
+git clone https://github.com/tianocore/edk2-non-osi.git
+git checkout 74d4da60a4
+
+git clone https://github.com/tianocore/edk2.git
+cd edk2
+git checkout 497ac7b6d7
+git submodule update --init
+cd ..
+
+git clone https://github.com/tianocore/edk2-platforms.git
+cd edk2-platforms
+git checkout c9e377b00f
+cd ..
+```
+2. Apply patches:
+
+```powershell
+cd edk2-platforms
+git apply ..\src\0001-SecureBoot-enabled.patch
+git apply ..\src\0002-SMBIOS-strings-changed.patch
+git apply ..\src\0003-Added-logo.patch
+git apply ..\src\0004-Copy-bds-module-from-edk2.patch
+git apply ..\src\0005-Added-bmc-ipmi-bootorder-control.patch
+cd ..
+```
+3. Build firmware
+
+```powershell
+cd edk2-platforms\Platform\Intel\PurleyOpenBoardPkg\BoardTiogaPass
+GitEdk2MinTiogaPass.bat
+cd edk2-platforms\Platform\Intel\PurleyOpenBoardPkg\BoardTiogaPass
+bld release
+```
+
+4. Final BIOS image will be Build\PurleyOpenBoardPkg\BoardTiagoPass\RELEASE_VS2015x86\FV\PLATFORM.fd
+5. This BIOS image needs to be merged with Intel SPS binary
+
+### How to flash
+
+To flash, use the [flashrom](https://github.com/flashrom/flashrom) or others tools
+
+## Test Report
+
+| Test Criteria                                                | Result |
+| ------------------------------------------------------------ | ------ |
+| The platform with OSF must be capable of booting an operating system whose code is openly available under an OSI-approved license (such as Linux). | PASS   |
+| Bare minimum: The platform with OSF needs to be able to be cold re-booted into OS 100 times sequentially without issue. | PASS   |
+| If the system advertises support for a warm reboot, the platform flashed with OSF needs to be able to be warm re-booted into OS 100 times sequentially without issue. | PASS   |
+
+
+
+| Configuration             | Value                                        |
+| :------------------------ | :------------------------------------------- |
+| UEFI                      | 0.1.2                                        |
+| Intel ME firmware version | SPS 4.01.04.505.0                            |
+| BMC                       | v1.12.11                                     |
+| Base OS                   | CentOS Linux 8                               |
+| Kernel                    | 4.18.0-240.e18.x86_64                        |
+| Base Board SN             | 0001-1021-0009                               |
+| CPU                       | 2x Intel(R) Xeon(R) Gold 6230R CPU @ 2.10GHz |
+| Memory                    | 12x Samsung M393A1K43DB1-CVF                 |
+| SATA                      | 4x INTEL SSDSC2KB240G8                       |
+| NVME                      | INTEL SSDPEKKA128G7                          |
+| PCIe                      | Mellanox ConnectX-4                          |
+
+
+
+## Potential Gaps To Use OCP Tioga Pass OSF in Production
+
+The OCP GAGAR>N OSF code base only supports Intel Server Platform Services (SPS) binary. Intel SPS binary is available under Intel agreement.
diff --git a/Gagarin/TiogaPass/bin/uefi_image.bin b/Gagarin/TiogaPass/bin/uefi_image.bin
diff --git a/Gagarin/TiogaPass/src/0001-SecureBoot-enabled.patch b/Gagarin/TiogaPass/src/0001-SecureBoot-enabled.patch
@@ -0,0 +1,203 @@
+From aa95c79c33b4fb454d6d13991cee2550f554a488 Mon Sep 17 00:00:00 2001
+From: Timofei Nikitin <[email protected]>
+Date: Sun, 6 Nov 2022 00:13:06 +0300
+Subject: [PATCH] SecureBoot enabled
+
+---
+ .../BoardTiogaPass/OpenBoardPkg.dsc           |  12 ++
+ .../BoardTiogaPass/PlatformPkgConfig.dsc      | 130 +++++++++---------
+ .../BoardTiogaPass/PlatformPkgPcd.dsc         |   7 +-
+ 3 files changed, 83 insertions(+), 66 deletions(-)
+
+diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
+index 5747717ecb..2db704d34d 100644
+--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
++++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc
+@@ -193,6 +193,14 @@
+   $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf
+   $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf
+
++    !if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
++    $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf
++    SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf {
++      <LibraryClasses>
++        ResetSystemLib|edk2/MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf
++    }
++  !endif
++
+ [Components.X64]
+
+   $(PLATFORM_SI_BIN_PACKAGE)/FV/FvLateSilicon/$(TARGET)/FvLateSilicon.inf
+@@ -254,3 +262,7 @@
+ !if gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable == TRUE
+   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ !endif
++
++!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
++  $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
++!endif
+\ No newline at end of file
+diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
+index cefb81b76e..63b67f4a4d 100644
+--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
++++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgConfig.dsc
+@@ -1,65 +1,65 @@
+-## @file
+-#
+-# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+-# Copyright (c) 2021, American Megatrends International LLC.<BR>
+-# SPDX-License-Identifier: BSD-2-Clause-Patent
+-#
+-##
+-
+-#
+-# TRUE is ENABLE. FALSE is DISABLE.
+-#
+-
+-[PcdsFixedAtBuild]
+-  gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
+-
+-[PcdsFeatureFlag]
+-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
+-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
+-  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
+-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
+-  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
+-
+-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1
+-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE
+-!endif
+-
+-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2
+-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
+-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE
+-!endif
+-
+-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3
+-  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
+-  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE
+-!endif
+-
+-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4
+-  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
+-!endif
+-
+-!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
+-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE
+-  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
+-!endif
+-
+-  !if $(TARGET) == DEBUG
+-    gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
+-  !else
+-    gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
+-  !endif
+-
+-  gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|TRUE
+-
+-  gPlatformTokenSpaceGuid.PcdLinuxBootEnable|FALSE
+-
+-!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == TRUE
+-  gPlatformTokenSpaceGuid.PcdFastBoot|TRUE
+-!else
+-  gPlatformTokenSpaceGuid.PcdFastBoot|FALSE
+-!endif
+-
+-!if gPlatformTokenSpaceGuid.PcdFastBoot == TRUE
+-  gIpmiFeaturePkgTokenSpaceGuid.PcdIpmiFeatureEnable|FALSE
+-  gPlatformTokenSpaceGuid.PcdUpdateConsoleInBds|FALSE
+-!endif
+\ No newline at end of file
++## @file
++#
++# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
++# Copyright (c) 2021, American Megatrends International LLC.<BR>
++# SPDX-License-Identifier: BSD-2-Clause-Patent
++#
++##
++
++#
++# TRUE is ENABLE. FALSE is DISABLE.
++#
++
++[PcdsFixedAtBuild]
++  gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
++
++[PcdsFeatureFlag]
++  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
++  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
++  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
++  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
++  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
++
++!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1
++  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE
++!endif
++
++!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2
++  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
++  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE
++!endif
++
++!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3
++  gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
++  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE
++!endif
++
++!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4
++  gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
++!endif
++
++!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
++  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE
++  gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
++!endif
++
++  !if $(TARGET) == DEBUG
++    gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
++  !else
++    gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
++  !endif
++
++  gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|TRUE
++
++  gPlatformTokenSpaceGuid.PcdLinuxBootEnable|FALSE
++
++!if gPlatformTokenSpaceGuid.PcdLinuxBootEnable == TRUE
++  gPlatformTokenSpaceGuid.PcdFastBoot|TRUE
++!else
++  gPlatformTokenSpaceGuid.PcdFastBoot|FALSE
++!endif
++
++!if gPlatformTokenSpaceGuid.PcdFastBoot == TRUE
++  gIpmiFeaturePkgTokenSpaceGuid.PcdIpmiFeatureEnable|FALSE
++  gPlatformTokenSpaceGuid.PcdUpdateConsoleInBds|FALSE
++!endif
+diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
+index bed0625df9..f297224d3f 100644
+--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
++++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
+@@ -25,7 +25,7 @@
+   # Stage 5 - boot to OS with security boot enabled
+   # Stage 6 - boot with advanced features enabled
+   #
+-  gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
++  gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
+
+ [PcdsFeatureFlag.common]
+   gPlatformTokenSpaceGuid.PcdLockCsrSsidSvidRegister|FALSE
+@@ -375,6 +375,11 @@
+
+   gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0
+
++  !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
++    gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
++    gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|0
++  !endif
++
+ [PcdsDynamicExDefault.X64]
+
+   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+-- 
+2.38.1.windows.1
+
diff --git a/Gagarin/TiogaPass/src/0002-SMBIOS-strings-changed.patch b/Gagarin/TiogaPass/src/0002-SMBIOS-strings-changed.patch
@@ -0,0 +1,45 @@
+From 42a639f830c22bad68df71c8b7d859cdeaa5bc94 Mon Sep 17 00:00:00 2001
+From: Timofei Nikitin <[email protected]>
+Date: Sun, 6 Nov 2022 01:17:36 +0300
+Subject: [PATCH] SMBIOS strings changed
+
+---
+ .../BoardTiogaPass/PlatformPkgPcd.dsc         | 22 +++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
+index f297224d3f..7fd30f1b7e 100644
+--- a/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
++++ b/Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/PlatformPkgPcd.dsc
+@@ -109,6 +109,28 @@
+
+ [PcdsDynamicExDefault]
+ !include $(PROJECT)/StructureConfig.dsc
++  #
++  # SMBIOS Type 0 BIOS Information Strings
++  #
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType0StringBiosReleaseDate|"11/01/2022"
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType0StringBiosVersion|"GAGAR>N 0.1.2"
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType0StringVendor|"GAGAR>N"
++    #
++  # SMBIOS Type 1 System Information Strings
++  #
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType1StringManufacturer|"GAGAR>N"
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType1StringProductName|"Tioga Pass Single Side"
++
++  #
++  # SMBIOS Type 2 Base Board Information Strings
++  #
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType2StringManufacturer|"GAGAR>N"
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType2StringProductName|"Tioga Pass Single Side"
++
++  #
++  # SMBIOS Type 3 System Enclosure Chassis Strings
++  #
++  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosType3StringManufacturer|"GAGAR>N"
+
+ [PcdsFixedAtBuild.X64]
+   gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x01, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00,  0x00, 0x01, 0x01, 0x01, 0x06, 0x00,  0x00, 0x01, 0x7F, 0xFF, 0x04, 0x00}
+-- 
+2.38.1.windows.1
+