🐛 Perform sign extension after conversion and rounding #147
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emustafa96
changed the title
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Hi @emustafa96, I've just checked your PR using this UVM testbench https://github.com/openhwgroup/cvfpu-uvm.git. I replicated the same operation described in the Issue #145 with your modifications and everything is fine. I also performed a regression test that involves random transactions with varying seeds and there are no problems that case either. I think it can be merged. |
MikeOpenHWGroup
approved these changes
Oct 21, 2025
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Thanks @emustafa96 and @rgiunti. Much appreciated. Approving and merging. |
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Fixes #145
As discussed in the issue, the sign extension should be performed after the result has been brought to in two complement form and it has been rounded.