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8350480: RISC-V: Relax assertion about registers in C2_MacroAssembler::minmax_fp #23723
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👋 Welcome back fyang! A progress list of the required criteria for merging this PR into |
@RealFYang This change now passes all automated pre-integration checks. ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details. After integration, the commit message for the final commit will be:
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Looks good.
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Thanks!
@Hamlin-Li @feilongjiang : Thanks! |
Going to push as commit a891630.
Your commit was automatically rebased without conflicts. |
@RealFYang Pushed as commit a891630. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Hi, please review this trivial change.
The current assertion about the registers is more than needed.
It requires that
dst
,src1
andsrc2
must be different from each other.But the code only required that
dst
must be different fromsrc1
andsrc2
.Patch simply relaxes the assersion removing the unneeded constraint.
fastdebug builds OK with change.
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git
Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/23723/head:pull/23723
$ git checkout pull/23723
Update a local copy of the PR:
$ git checkout pull/23723
$ git pull https://git.openjdk.org/jdk.git pull/23723/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 23723
View PR using the GUI difftool:
$ git pr show -t 23723
Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/23723.diff
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