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aarch64: improve RegPrinter docs and add CPU_DEBUG_CAPS verification prints #35715

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aarch64: improve RegPrinter docs and add CPU_DEBUG_CAPS verification prints #35715

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38 changes: 28 additions & 10 deletions src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -15,18 +15,36 @@
namespace ov::intel_cpu::aarch64 {

// Usage
// 1. Include this header in AArch64 JIT kernels if register printing is required.
// 2. Invoke the RegPrinter::print method with a supported register/precision combination.
// Examples:
// RegPrinter::print<float>(*this, vmm_val, "vmm_val");
// RegPrinter::print<int>(*this, vmm_idx);
// RegPrinter::print<int>(*this, reg_work_amount, "reg_work_amount");
// 1. Include this header in AArch64 JIT kernels where register printing is needed.
// 2. Call RegPrinter::print<PRC_T>(h, reg) or RegPrinter::print<PRC_T>(h, reg, "name").
// The name argument must be a string literal (not a local char* variable) because
// the pointer is captured at JIT-emit time and dereferenced at JIT-run time.
//
// Supported combinations:
// Example 1:
// Invocation: RegPrinter::print<float>(*this, vmm_val, "vmm_val");
// Console: vmm_val | v0: {1.5, 2.0, 3.0, 4.0}
//
// Example 2:
// Invocation: RegPrinter::print<float>(*this, vmm_val);
// Console: v0: {1.5, 2.0, 3.0, 4.0}
//
// Example 3:
// Invocation: RegPrinter::print<int>(*this, vmm_idx, "vmm_idx");
// Console: vmm_idx | v1: {5, 6, 0, 2}
//
// Example 4:
// Invocation: RegPrinter::print<int>(*this, reg_work_amount, "reg_work_amount");
// Console: reg_work_amount | x9: 8
//
// Example 5:
// Invocation: RegPrinter::print<int>(*this, reg_work_amount);
// Console: x9: 8
//
// Supported combinations (VReg prints vec_len/sizeof(PRC_T) elements; XReg/WReg print 1):
// fp32 int32 int8 u8
// VReg Yes Yes No No
// XReg Yes Yes No No
// WReg Yes Yes No No
// VReg Yes Yes No No
// XReg Yes Yes No No
// WReg Yes Yes No No
class RegPrinter {
public:
using jit_generator_t = dnnl::impl::cpu::aarch64::jit_generator_t;
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18 changes: 18 additions & 0 deletions src/plugins/intel_cpu/src/nodes/kernels/aarch64/jit_uni_eltwise_generic.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,9 @@
#include "openvino/core/except.hpp"
#include "openvino/core/type/element_type.hpp"
#include "selective_build.h"
#ifdef CPU_DEBUG_CAPS
# include "emitters/plugin/aarch64/debug_capabilities.hpp"
#endif

namespace ov::intel_cpu {
namespace aarch64 {
Expand Down Expand Up @@ -251,8 +254,20 @@ void jit_uni_eltwise_generic<isa>::generate() {
}
}

#ifdef CPU_DEBUG_CAPS
for (size_t i = 0; i < jep.inputs_number; i++) {
if (jep.src_size[i] != 1) {
ov::intel_cpu::aarch64::RegPrinter::print<float>(*this, get_vmm_reg(i), "src_vmm");
}
}
#endif

compute_eltwise_op();

#ifdef CPU_DEBUG_CAPS
ov::intel_cpu::aarch64::RegPrinter::print<float>(*this, vmm_dst, "vmm_dst");
#endif

apply_post_ops();

store_vector(reg_dst, vmm_dst, exec_prc, jep.dst_prc);
Expand All @@ -265,6 +280,9 @@ void jit_uni_eltwise_generic<isa>::generate() {

add(reg_dst, reg_dst, jep.dst_prc.size() * loop_step);
sub(reg_work_amount, reg_work_amount, loop_step);
#ifdef CPU_DEBUG_CAPS
ov::intel_cpu::aarch64::RegPrinter::print<int>(*this, reg_work_amount, "reg_work_amount");
#endif
if (jep_.oc_size > 1) {
add(reg_oc_off, reg_oc_off, loop_step * sizeof(float));
}
Expand Down
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