pulp-platform · Lynx005F · Jun 27, 2024 · Jul 8, 2024 · Jul 12, 2024 · Jul 12, 2024
diff --git a/Bender.local b/Bender.local
@@ -1,2 +1,12 @@
 overrides:
+  # Repository got renamed, fpnew is the old name cvfpu the new one
   fpnew: { git: "https://github.com/pulp-platform/cvfpu.git", rev: "pulp-v0.1.3" }
+
+  # branch: itemm/redmule_features for new features
+  hwpe-stream       : { git: "https://github.com/Lynx005F/hwpe-stream.git" , rev: a39dd676f7f4594910306dfcd190ef0ff94e4381 } 
+
+  # branch: master, need newer version for voter macros
+  redundancy_cells  : { git: "https://github.com/pulp-platform/redundancy_cells" , rev: 74749bdf83a8ceaaa99c5c73d2427020f54c70b0 } 
+
+  # version which redmule and hci require, not version which redundancy_cells requires (we don't need those cells)
+  register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.3.1                           } 
diff --git a/Bender.lock b/Bender.lock
@@ -23,8 +23,8 @@ packages:
     dependencies:
     - common_cells
   common_cells:
-    revision: 0d67563b6b592549542544f1abc0f43e5d4ee8b4
-    version: 1.35.0
+    revision: c27bce39ebb2e6bae52f60960814a2afca7bd4cb
+    version: 1.37.0
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
@@ -61,10 +61,10 @@ packages:
     dependencies:
     - common_cells
   hci:
-    revision: 97c8d93f513595e7392078ba2ee4bda50fe1e395
+    revision: cbfa4a809e1e15dd55610ee4662969b297af7e64
     version: null
     source:
-      Git: https://github.com/pulp-platform/hci.git
+      Git: https://github.com/Lynx005F/hci.git
     dependencies:
     - cluster_interconnect
     - common_cells
@@ -73,17 +73,17 @@ packages:
     - redundancy_cells
     - register_interface
   hwpe-ctrl:
-    revision: a5966201aeeb988d607accdc55da933a53c6a56e
+    revision: 376c5da312d60cecd732336d23a0d0da2a1d0ea2
     version: null
     source:
-      Git: https://github.com/pulp-platform/hwpe-ctrl.git
+      Git: https://github.com/Lynx005F/hwpe-ctrl.git
     dependencies:
     - tech_cells_generic
   hwpe-stream:
-    revision: 65c99a4a2f37a79acee800ab0151f67dfb1edef1
-    version: 1.8.0
+    revision: a39dd676f7f4594910306dfcd190ef0ff94e4381
+    version: null
     source:
-      Git: https://github.com/pulp-platform/hwpe-stream.git
+      Git: https://github.com/Lynx005F/hwpe-stream.git
     dependencies:
     - tech_cells_generic
   l2_tcdm_hybrid_interco:
@@ -93,10 +93,10 @@ packages:
       Git: https://github.com/pulp-platform/L2_tcdm_hybrid_interco.git
     dependencies: []
   redundancy_cells:
-    revision: c37bdb47339bf70e8323de8df14ea8bbeafb6583
+    revision: 74749bdf83a8ceaaa99c5c73d2427020f54c70b0
     version: null
     source:
-      Git: https://github.com/pulp-platform/redundancy_cells.git
+      Git: https://github.com/pulp-platform/redundancy_cells
     dependencies:
     - common_cells
     - common_verification

diff --git a/Bender.yml b/Bender.yml
@@ -23,13 +23,14 @@ package:
 
 dependencies:
   cv32e40p          : { git: "https://github.com/pulp-platform/cv32e40p.git"          , rev: "pulpissimo-v4.1.0"                      }
-  hwpe-stream       : { git: "https://github.com/pulp-platform/hwpe-stream.git"       , version: 1.6                                  }
-  hci               : { git: "https://github.com/pulp-platform/hci.git"               , rev: "97c8d93"                                } # branch: lg/ecc_rebase
-  hwpe-ctrl         : { git: "https://github.com/pulp-platform/hwpe-ctrl.git"         , rev: a5966201aeeb988d607accdc55da933a53c6a56e } # branch: master
+  hwpe-stream       : { git: "https://github.com/Lynx005F/hwpe-stream.git"            , rev: a39dd676f7f4594910306dfcd190ef0ff94e4381 } # branch: itemm/redmule_features
+  hci               : { git: "https://github.com/Lynx005F/hci.git"                    , rev: cbfa4a809e1e15dd55610ee4662969b297af7e64 } # branch: itemm/redmule_features
+  hwpe-ctrl         : { git: "https://github.com/Lynx005F/hwpe-ctrl.git"              , rev: 376c5da312d60cecd732336d23a0d0da2a1d0ea2 } # branch: itemm/redmule_features
   fpnew             : { git: "https://github.com/pulp-platform/cvfpu.git"             , rev: "pulp-v0.1.3"                            }
   common_cells      : { git: "https://github.com/pulp-platform/common_cells.git"      , version: 1.21.0                               }
   tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.11                               }
   register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.3.1                                }
+  redundancy_cells  : { git: "https://github.com/pulp-platform/redundancy_cells"      , rev: 74749bdf83a8ceaaa99c5c73d2427020f54c70b0 } # branch: master
 
 sources:
   files:
@@ -40,6 +41,8 @@ sources:
     - rtl/redmule_castin.sv
     - rtl/redmule_castout.sv
     - rtl/redmule_streamer.sv
+    - rtl/redmule_streamin.sv
+    - rtl/redmule_streamout.sv
     - rtl/redmule_x_buffer.sv
     - rtl/redmule_w_buffer.sv
     - rtl/redmule_z_buffer.sv

diff --git a/Makefile b/Makefile
@@ -25,7 +25,7 @@ QUESTA         ?= questa-2019.3-kgf
 BENDER_DIR     ?= .
 BENDER         ?= bender
 TEST_SRCS      ?= sw/redmule.c
-WAVES          ?= $(mkfile_path)/wave.do
+WAVES          ?= $(mkfile_path)/wave.tcl
 ISA            ?= riscv
 ARCH           ?= rv
 XLEN           ?= 32
@@ -38,10 +38,11 @@ INI_PATH  = $(mkfile_path)/modelsim.ini
 WORK_PATH = $(BUILD_DIR)
 
 # Useful Parameters
-gui      ?= 0
-ipstools ?= 0
-P_STALL  ?= 0.0
-USE_ECC  ?= 0
+gui            ?= 0
+ipstools       ?= 0
+P_STALL        ?= 0.0
+USE_ECC        ?= 0
+USE_REDUNDANCY ?= 0
 
 ifeq ($(verbose),1)
 FLAGS += -DVERBOSE
@@ -51,7 +52,7 @@ endif
 CC=$(PULP_RISCV_GCC_TOOLCHAIN)/bin/$(ISA)$(XLEN)-unknown-elf-gcc
 LD=$(PULP_RISCV_GCC_TOOLCHAIN)/bin/$(ISA)$(XLEN)-unknown-elf-gcc
 OBJDUMP=$(ISA)$(XLEN)-unknown-elf-objdump
-CC_OPTS=-march=$(ARCH)$(XLEN)$(XTEN) -D__$(ISA)__ -O2 -g -Wextra -Wall -Wno-unused-parameter -Wno-unused-variable -Wno-unused-function -Wundef -fdata-sections -ffunction-sections -MMD -MP
+CC_OPTS=-march=$(ARCH)$(XLEN)$(XTEN) -D__$(ISA)__ -O2 -g -Wextra -Wall -Wno-unused-parameter -Wno-unused-variable -Wno-unused-function -Wundef -fdata-sections -ffunction-sections -MMD -MP -DUSE_REDUNDANCY=$(USE_REDUNDANCY)
 LD_OPTS=-march=$(ARCH)$(XLEN)$(XTEN) -D__$(ISA)__ -MMD -MP -nostartfiles -nostdlib -Wl,--gc-sections
 
 # Setup build object dirs
@@ -61,16 +62,12 @@ BIN=$(BUILD_DIR)/$(TEST_SRCS)/verif
 DUMP=$(BUILD_DIR)/$(TEST_SRCS)/verif.dump
 STIM_INSTR=$(BUILD_DIR)/$(TEST_SRCS)/stim_instr.txt
 STIM_DATA=$(BUILD_DIR)/$(TEST_SRCS)/stim_data.txt
-VSIM_INI=$(BUILD_DIR)/$(TEST_SRCS)/modelsim.ini
-VSIM_LIBS=$(BUILD_DIR)/$(TEST_SRCS)/work
 
 # Build implicit rules
 $(STIM_INSTR) $(STIM_DATA): $(BIN)
 	objcopy --srec-len 1 --output-target=srec $(BIN) $(BIN).s19
 	sw/parse_s19.pl $(BIN).s19 > $(BIN).txt
 	python sw/s19tomem.py $(BIN).txt $(STIM_INSTR) $(STIM_DATA)
-	ln -sfn $(INI_PATH) $(VSIM_INI)
-	ln -sfn $(WORK_PATH) $(VSIM_LIBS)
 
 $(BIN): $(CRT) $(OBJ) sw/link.ld
 	$(LD) $(LD_OPTS) -o $(BIN) $(CRT) $(OBJ) -Tsw/link.ld
@@ -95,23 +92,59 @@ all: $(STIM_INSTR) $(STIM_DATA) dis
 # Run the simulation
 run: $(CRT)
 ifeq ($(gui), 0)
-	cd $(BUILD_DIR)/$(TEST_SRCS);          \
-	$(QUESTA) vsim -c vopt_tb -do "run -a" \
-	-gSTIM_INSTR=stim_instr.txt            \
-	-gSTIM_DATA=stim_data.txt              \
-	-gPROB_STALL=$(P_STALL)                \
-	-gUSE_ECC=$(USE_ECC)                   \
-		-suppress vsim-3009
+	$(QUESTA) vsim -c vopt_tb          \
+	-do "run -a"                       \
+    -do "exit"                         \
+	-gSTIM_INSTR=$(STIM_INSTR)         \
+	-gSTIM_DATA=$(STIM_DATA)           \
+	-gPROB_STALL=$(P_STALL)            \
+	-gUSE_ECC=$(USE_ECC)               \
+	-gUSE_REDUNDANCY=$(USE_REDUNDANCY) \
+	-suppress vsim-3009
 else
-	cd $(BUILD_DIR)/$(TEST_SRCS);      \
 	$(QUESTA) vsim vopt_tb             \
 	-do "add log -r sim:/redmule_tb/*" \
 	-do "source $(WAVES)"              \
-	-gSTIM_INSTR=stim_instr.txt        \
-	-gSTIM_DATA=stim_data.txt          \
+	-gSTIM_INSTR=$(STIM_INSTR)         \
+	-gSTIM_DATA=$(STIM_DATA)           \
 	-gPROB_STALL=$(P_STALL)            \
 	-gUSE_ECC=$(USE_ECC)               \
-		-suppress vsim-3009
+	-gUSE_REDUNDANCY=$(USE_REDUNDANCY) \
+	-suppress vsim-3009
+endif
+
+seed     ?= 42
+tests    ?= 100000
+
+# Run vulnerability analysis
+analysis: M=12
+analysis: N=16
+analysis: K=16 
+analysis: USE_REDUNDANCY=1
+analysis: golden all $(CRT)
+ifeq ($(gui), 0)
+	$(QUESTA) vsim -c vopt_tb                               \
+	-do "set ::initial_seed ${seed}"                        \
+	-do "set ::max_num_tests ${tests}"                      \
+	-do "vulnerability_analysis/vulnerability_analysis.tcl" \
+	-gSTIM_INSTR=$(STIM_INSTR)                              \
+	-gSTIM_DATA=$(STIM_DATA)                                \
+	-gPROB_STALL=$(P_STALL)                                 \
+	-gUSE_ECC=1                                             \
+	-gUSE_REDUNDANCY=1                                      \
+	-suppress vsim-3009
+else
+	$(QUESTA) vsim vopt_tb             \
+	-do "add log -r sim:/redmule_tb/*" \
+	-do "source $(WAVES)"              \
+	-do "set ::initial_seed ${seed}"   \
+	-do "set ::max_num_tests ${tests}" \
+	-gSTIM_INSTR=$(STIM_INSTR)         \
+	-gSTIM_DATA=$(STIM_DATA)           \
+	-gPROB_STALL=$(P_STALL)            \
+	-gUSE_ECC=1                        \
+	-gUSE_REDUNDANCY=1                 \
+	-suppress vsim-3009
 endif
 
 # Download bender
@@ -160,26 +193,26 @@ hw-clean-all:
 	rm -rf $(BUILD_DIR)
 	rm -rf .bender
 	rm -rf $(compile_script)
-	rm -rf modelsim.ini
+	rm -rf $(INI_PATH)
 	rm -rf *.log
 	rm -rf transcript
 	rm -rf .cached_ipdb.json
 
 hw-opt:
-	$(QUESTA) vopt +acc=npr -o vopt_tb redmule_tb -floatparameters+redmule_tb -work $(BUILD_DIR)
+	$(QUESTA) vopt -O0 +acc=npr -o vopt_tb redmule_tb -floatparameters+redmule_tb -work $(BUILD_DIR)
 
 hw-compile:
 	$(QUESTA) vsim -c +incdir+$(UVM_HOME) -do 'quit -code [source $(compile_script)]'
 
 hw-lib:
-	@touch modelsim.ini
+	@touch $(INI_PATH)
 	@mkdir -p $(BUILD_DIR)
 	@$(QUESTA) vlib $(BUILD_DIR)
 	@$(QUESTA) vmap work $(BUILD_DIR)
-	@chmod +w modelsim.ini
+	@chmod +w $(INI_PATH)
 
 hw-clean:
 	rm -rf transcript
-	rm -rf modelsim.ini
+	rm -rf $(INI_PATH)
 
 hw-all: hw-clean hw-lib hw-compile hw-opt
diff --git a/rtl/redmule_ce.sv b/rtl/redmule_ce.sv
@@ -28,12 +28,15 @@ module redmule_ce
   parameter type                     TagType     = logic                        ,
   parameter type                     AuxType     = logic                        ,
   parameter logic                    Stallable   = 1'b0                         ,
-  localparam int unsigned            BITW        = fpnew_pkg::fp_width(FpFormat)
+  parameter bit                      W_PARITY    = 0                            ,
+  localparam int unsigned            BITW        = fpnew_pkg::fp_width(FpFormat), // Number of bits for the given format
+  parameter  int unsigned            PARW        = BITW / 8                       // Number of parity bits for the given format
 )(
   input  logic                               clk_i             ,
   input  logic                               rst_ni            ,
   input  logic                    [BITW-1:0] x_input_i         ,
   input  logic                    [BITW-1:0] w_input_i         ,
+  input  logic                    [PARW-1:0] w_parity_i         ,
   input  logic                    [BITW-1:0] y_bias_i          ,
   input  logic                    [2:0]      fma_is_boxed_i    ,
   input  logic                    [1:0]      noncomp_is_boxed_i,
@@ -57,14 +60,12 @@ module redmule_ce
   output AuxType                             aux_o             ,
   output logic                               out_valid_o       ,
   input  logic                               out_ready_i       ,
-  output logic                               busy_o
+  output logic                               busy_o            ,
+  output logic                               fault_o
 );
 
 // Internal logic binding
-logic [BITW-1:0] y_bias   ,
-                 fma_y    ,
-                 noncomp_y,
-                 noncomp_y_d;
+logic [BITW-1:0] fma_y, noncomp_y, noncomp_y_d;
 
 fpnew_pkg::operation_e op1_int;
 logic stage2_noncomp_clk_en        ,
@@ -198,6 +199,13 @@ logic [1:0][BITW-1:0] stage1_noncomp_operands;
 assign x_input = x_input_i;
 assign w_input = w_input_i;
 
+// Calculate parity 
+if (W_PARITY) begin
+  assign fault_o = ^w_input_i ^ ^w_parity_i;
+end else begin
+  assign fault_o = 1'b0;
+end
+
 /*******************************************************************************/
 /* Assigning input signals to the stage1 FMA and to the stage1 NONCOMP module  */
 /*******************************************************************************/