Vector arith idl

.devcontainer/Dockerfile

@@ -25,7 +25,8 @@ RUN apt-get install -y --no-install-recommends git \
                                                clang-format \
                                                clang-tidy \
                                                libelf-dev \
-                                               gcc-riscv64-unknown-elf
+                                               gcc-riscv64-unknown-elf \
+                                               shellcheck
 RUN apt-get clean autoclean
 RUN apt-get autoremove -y
 RUN rm -rf /var/lib/{apt,dpkg,cache,log}/*

.github/workflows/regress.yml

@@ -191,3 +191,31 @@ jobs:
         run: ./bin/build_container
       - name: Generate extension PDF
         run: ./do gen:profile[MockProfileRelease]
+  regress-gen-go:
+    runs-on: ubuntu-latest
+    env:
+      SINGULARITY: 1
+    steps:
+      - name: Clone Github Repo Action
+        uses: actions/checkout@v4
+      - name: Setup apptainer
+        uses: eWaterCycle/[email protected]
+      - name: Get container from cache
+        id: cache-sif
+        uses: actions/cache@v4
+        with:
+          path: .singularity/image.sif
+          key: ${{ hashFiles('container.def', 'bin/.container-tag') }}
+      - name: Get gems and node files from cache
+        id: cache-bundle-npm
+        uses: actions/cache@v4
+        with:
+          path: |
+            .home/.gems
+            node_modules
+          key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }}
+      - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }}
+        name: Build container
+        run: ./bin/build_container
+      - name: Generate Go code
+        run: ./do gen:go

.pre-commit-config.yaml

@@ -74,11 +74,14 @@ repos:
     hooks:
       - id: pyupgrade
 
-  # - repo: https://github.com/koalaman/shellcheck-precommit
-  #   rev: v0.10.0
-  #   hooks:
-  #     - id: shellcheck
-  #       args: ["--severity=error"]
+  - repo: local
+    hooks:
+      - id: shellcheck
+        name: shellcheck
+        types: [shell]
+        language: system
+        entry: shellcheck
+        args: ["--severity=error"]
 
   - repo: https://github.com/scop/pre-commit-shfmt
     rev: v3.11.0-1

Rakefile

@@ -435,6 +435,8 @@ namespace :test do
     Rake::Task["#{$root}/gen/certificate_doc/pdf/MockCertificateModel.pdf"].invoke
     Rake::Task["#{$root}/gen/profile_doc/pdf/MockProfileRelease.pdf"].invoke
 
+    Rake::Task["gen:go"].invoke
+
     puts
     puts "Regression test PASSED"
   end

arch/csr/H/henvcfgh.yaml

@@ -4,6 +4,7 @@ $schema: "csr_schema.json#"
 kind: csr
 name: henvcfgh
 address: 0x61A
+base: 32
 long_name: most-significant 32 bits of Hypervisor Environment Configuration
 description: |
   The henvcfgh CSR is a 32-bit read/write register for the most-significant 32 bits of `henvcfg`.

arch/csr/Zihpm/hpmcounter10h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter10h
 long_name: User-mode Hardware Performance Counter 7, high half
 address: 0xC8A
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter10h`.
 

arch/csr/Zihpm/hpmcounter11h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter11h
 long_name: User-mode Hardware Performance Counter 8, high half
 address: 0xC8B
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter11h`.
 

arch/csr/Zihpm/hpmcounter12h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter12h
 long_name: User-mode Hardware Performance Counter 9, high half
 address: 0xC8C
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter12h`.
 

arch/csr/Zihpm/hpmcounter13h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter13h
 long_name: User-mode Hardware Performance Counter 10, high half
 address: 0xC8D
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter13h`.
 

arch/csr/Zihpm/hpmcounter14h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter14h
 long_name: User-mode Hardware Performance Counter 11, high half
 address: 0xC8E
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter14h`.
 

arch/csr/Zihpm/hpmcounter15h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter15h
 long_name: User-mode Hardware Performance Counter 12, high half
 address: 0xC8F
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter15h`.
 

arch/csr/Zihpm/hpmcounter16h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter16h
 long_name: User-mode Hardware Performance Counter 13, high half
 address: 0xC90
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter16h`.
 

arch/csr/Zihpm/hpmcounter17h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter17h
 long_name: User-mode Hardware Performance Counter 14, high half
 address: 0xC91
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter17h`.
 

arch/csr/Zihpm/hpmcounter18h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter18h
 long_name: User-mode Hardware Performance Counter 15, high half
 address: 0xC92
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter18h`.
 

arch/csr/Zihpm/hpmcounter19h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter19h
 long_name: User-mode Hardware Performance Counter 16, high half
 address: 0xC93
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter19h`.
 

arch/csr/Zihpm/hpmcounter20h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter20h
 long_name: User-mode Hardware Performance Counter 17, high half
 address: 0xC94
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter20h`.
 

arch/csr/Zihpm/hpmcounter21h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter21h
 long_name: User-mode Hardware Performance Counter 18, high half
 address: 0xC95
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter21h`.
 

arch/csr/Zihpm/hpmcounter22h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter22h
 long_name: User-mode Hardware Performance Counter 19, high half
 address: 0xC96
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter22h`.
 

arch/csr/Zihpm/hpmcounter23h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter23h
 long_name: User-mode Hardware Performance Counter 20, high half
 address: 0xC97
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter23h`.
 

arch/csr/Zihpm/hpmcounter24h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter24h
 long_name: User-mode Hardware Performance Counter 21, high half
 address: 0xC98
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter24h`.
 

arch/csr/Zihpm/hpmcounter25h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter25h
 long_name: User-mode Hardware Performance Counter 22, high half
 address: 0xC99
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter25h`.
 

arch/csr/Zihpm/hpmcounter26h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter26h
 long_name: User-mode Hardware Performance Counter 23, high half
 address: 0xC9A
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter26h`.
 

arch/csr/Zihpm/hpmcounter27h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter27h
 long_name: User-mode Hardware Performance Counter 24, high half
 address: 0xC9B
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter27h`.
 

arch/csr/Zihpm/hpmcounter28h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter28h
 long_name: User-mode Hardware Performance Counter 25, high half
 address: 0xC9C
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter28h`.
 

arch/csr/Zihpm/hpmcounter29h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter29h
 long_name: User-mode Hardware Performance Counter 26, high half
 address: 0xC9D
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter29h`.
 

arch/csr/Zihpm/hpmcounter30h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter30h
 long_name: User-mode Hardware Performance Counter 27, high half
 address: 0xC9E
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter30h`.
 

arch/csr/Zihpm/hpmcounter31h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter31h
 long_name: User-mode Hardware Performance Counter 28, high half
 address: 0xC9F
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter31h`.
 

arch/csr/Zihpm/hpmcounter3h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter3h
 long_name: User-mode Hardware Performance Counter 0, high half
 address: 0xC83
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter3h`.
 

arch/csr/Zihpm/hpmcounter4h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter4h
 long_name: User-mode Hardware Performance Counter 1, high half
 address: 0xC84
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter4h`.
 

arch/csr/Zihpm/hpmcounter5h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter5h
 long_name: User-mode Hardware Performance Counter 2, high half
 address: 0xC85
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter5h`.
 

arch/csr/Zihpm/hpmcounter6h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter6h
 long_name: User-mode Hardware Performance Counter 3, high half
 address: 0xC86
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter6h`.
 

arch/csr/Zihpm/hpmcounter7h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter7h
 long_name: User-mode Hardware Performance Counter 4, high half
 address: 0xC87
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter7h`.
 

arch/csr/Zihpm/hpmcounter8h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter8h
 long_name: User-mode Hardware Performance Counter 5, high half
 address: 0xC88
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter8h`.
 

arch/csr/Zihpm/hpmcounter9h.yaml

@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter9h
 long_name: User-mode Hardware Performance Counter 6, high half
 address: 0xC89
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter9h`.
 

arch/csr/menvcfgh.yaml

@@ -4,6 +4,7 @@ $schema: "csr_schema.json#"
 kind: csr
 name: menvcfgh
 address: 0x31A
+base: 32
 long_name: Machine Environment Configuration
 description: Contains bits to enable/disable extensions
 priv_mode: M

arch/csr/mseccfgh.yaml

@@ -4,6 +4,7 @@ $schema: "csr_schema.json#"
 kind: csr
 name: mseccfgh
 long_name: Most significant 32 bits of Machine Security Configuration
+base: 32
 address: 0x757
 priv_mode: M
 length: 32

arch/csr/timeh.yaml

@@ -5,6 +5,7 @@ kind: csr
 name: timeh
 long_name: High-half timer for RDTIME Instruction
 address: 0xC81
+base: 32
 description: |
   [when,"TIME_CSR_IMPLEMENTED == false"]
   This CSR does not exist, and access will cause an IllegalInstruction exception.

arch/ext/Zcd.yaml

@@ -39,5 +39,5 @@ versions:
       allOf:
         - anyOf:
           - { name: Zca, version: "= 1.0.0" }
-          - { name: C, version: "= 1.0.0" }
+          - { name: C, version: "~> 2.0.0" }
         - { name: D, version: "~> 2.2.0" }

arch/ext/Zce.yaml

@@ -76,3 +76,7 @@ versions:
       #   - [Zcb, "1.0.0"]
       #   - [Zcmp, "1.0.0"]
       #   - [Zcmt, "1.0.0"]
+conflicts:
+  anyOf:
+    - allOf: [C, D]
+    - Zcd

arch/ext/Zcf.yaml

@@ -5,7 +5,7 @@ kind: extension
 name: Zcf
 long_name: Compressed instructions for single precision floating point
 description: |
-  Zcf is the existing set of compressed single precision floating point loads and stores:
+  Zcf is the existing set of compressed single precision floating point loads and stores (RV32 only):
   `c.flw`, `c.flwsp`, `c.fsw`, `c.fswsp`.
 
 type: unprivileged
@@ -35,4 +35,9 @@ versions:
       - name: Graeme Smecher
       - name: Nicolas Brunie
       - name: Jiawei
-    requires: F
+    requires:
+      allOf:
+        - anyOf:
+          - { name: Zca, version: "= 1.0.0" }
+          - { name: C, version: "~> 2.0.0" }
+        - { name: F, version: "~> 2.2.0" }

arch/ext/Zcmp.yaml

@@ -88,6 +88,7 @@ versions:
       - name: Graeme Smecher
       - name: Nicolas Brunie
       - name: Jiawei
+    requires: { name: Zca, version: ">= 1.0.0" }
 conflicts:
   anyOf:
     - allOf: [C, D]