Issues: riscv/riscv-fast-interrupt
Issues list
Spec doesn't say to clear the second lowest bit of trap handler addresses
v1.0
resolve for 1.0
#427
opened Oct 14, 2024 by
Timmmm
In Appendix, we should not have CLIC interrupt ID recommendation chapter.
v1.0
resolve for 1.0
#426
opened Oct 7, 2024 by
jb-brelot-nxp
clicintattr.mode should not be writable from S-mode
v1.0
resolve for 1.0
#424
opened Oct 4, 2024 by
christian-herber-nxp
Scratch Swap CSR (sscratchcswl) CSR section missing in ssclic chapter
v1.0
resolve for 1.0
#422
opened Sep 30, 2024 by
james-ball-qualcomm
The smclicshv extension naming (i.e. sm*) suggests it only has M-mode features but it affects S-mode and has one S-mode CSR bit
reorg
Reorganization for Priv ISA manual integration
v1.0
resolve for 1.0
#421
opened Sep 30, 2024 by
james-ball-qualcomm
Recommend moving definition of indirect CSRs into their own chapter and clarifying they are accessed via M-mode or S-mode CSRs.
reorg
Reorganization for Priv ISA manual integration
v1.0
resolve for 1.0
#420
opened Sep 30, 2024 by
james-ball-qualcomm
Inconsistency on which fields are zeroed when switching to CLINT mode
v1.0
resolve for 1.0
#418
opened Sep 24, 2024 by
Timmmm
Write side-effects for csrrs rd, mnxti, rs1 when rs1 is not x0
v1.0
resolve for 1.0
#415
opened Sep 18, 2024 by
MarkHillCodasip
Move register layout definitions into wavedrom
v1.0
resolve for 1.0
#414
opened Sep 17, 2024 by
christian-herber-nxp
Explicitly list dependence on Smcsrind/Sscsrind
v1.0
resolve for 1.0
#412
opened Sep 12, 2024 by
christian-herber-nxp
The text definition of resolve for 1.0
xscratchcswl is incomplete
v1.0
#407
opened Sep 11, 2024 by
Timmmm
xscratchcswl privilege behaviour not fully specified
v1.0
resolve for 1.0
#406
opened Sep 11, 2024 by
Timmmm
Clarify behaviour of xnxti register version in smclicshv
v1.0
resolve for 1.0
#402
opened Aug 27, 2024 by
jakubahh
Make shv a per level property
post-v1.0
To be handled after v1.0
#400
opened Aug 15, 2024 by
christian-herber-nxp
an exception trap on the trap handler function address fetch cannot return to the instruction interrupted (smclicshv)
v1.0
resolve for 1.0
#399
opened Jul 15, 2024 by
hirooih
Missing a catchy terminology for the selection priority
post-v1.0
To be handled after v1.0
#396
opened May 16, 2024 by
christian-herber-nxp
Require immediate evaluation of clicintie and clicintip
v1.0
resolve for 1.0
#378
opened Mar 5, 2024 by
Silabs-ArjanB
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