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stm32cube: stm32fx: remove phy init and config #300

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a13e281
stm32cube: stm32f1: excluded phy init and config
maass-hamburg Dec 4, 2025
36ffb04
stm32cube: stm32f2: excluded phy init and config
maass-hamburg Dec 4, 2025
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7 changes: 7 additions & 0 deletions stm32cube/stm32f1xx/README
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Original file line number Diff line number Diff line change
Expand Up @@ -56,4 +56,11 @@ Patch List:
Impacted files:
drivers/include/Legacy/stm32_hal_legacy.h

*stm32cube: stm32f1: excluded phy init and config
exclude phy init and config as that is already
done in zephyr before and we don't want it to
be overwritten
Impacted files:
drivers/src/stm32f1xx_hal_eth.c

See release_note.html from STM32Cube
7 changes: 6 additions & 1 deletion stm32cube/stm32f1xx/drivers/src/stm32f1xx_hal_eth.c
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Original file line number Diff line number Diff line change
Expand Up @@ -211,7 +211,10 @@ static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
*/
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg1 = 0U, phyreg = 0U;
uint32_t tmpreg1 = 0U;
#ifndef __ZEPHYR__
uint32_t phyreg = 0U;
#endif /* __ZEPHYR__ */
uint32_t hclk = 60000000U;
uint32_t tickstart = 0U;
uint32_t err = ETH_SUCCESS;
Expand Down Expand Up @@ -306,6 +309,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
(heth->Instance)->MACMIIAR = (uint32_t)tmpreg1;

#ifndef __ZEPHYR__
/*-------------------- PHY initialization and configuration ----------------*/
/* Put the PHY in reset mode */
if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK)
Expand Down Expand Up @@ -465,6 +469,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/* Delay to assure PHY configuration */
HAL_Delay(PHY_CONFIG_DELAY);
}
#endif /* __ZEPHYR__ */

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);
Expand Down
7 changes: 7 additions & 0 deletions stm32cube/stm32f2xx/README
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Original file line number Diff line number Diff line change
Expand Up @@ -56,4 +56,11 @@ Patch List:
Impacted files:
drivers/include/Legacy/stm32_hal_legacy.h

*stm32cube: stm32f2: excluded phy init and config
exclude phy init and config as that is already
done in zephyr before and we don't want it to
be overwritten
Impacted files:
drivers/src/stm32f2xx_hal_eth.c

See release_note.html from STM32Cube
7 changes: 6 additions & 1 deletion stm32cube/stm32f2xx/drivers/src/stm32f2xx_hal_eth.c
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Original file line number Diff line number Diff line change
Expand Up @@ -209,7 +209,10 @@ static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
*/
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg1 = 0U, phyreg = 0U;
uint32_t tmpreg1 = 0U;
#ifndef __ZEPHYR__
uint32_t phyreg = 0U;
#endif /* __ZEPHYR__ */
uint32_t hclk = 60000000U;
uint32_t tickstart = 0U;
uint32_t err = ETH_SUCCESS;
Expand Down Expand Up @@ -312,6 +315,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
(heth->Instance)->MACMIIAR = (uint32_t)tmpreg1;

#ifndef __ZEPHYR__
/*-------------------- PHY initialization and configuration ----------------*/
/* Put the PHY in reset mode */
if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK)
Expand Down Expand Up @@ -471,6 +475,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/* Delay to assure PHY configuration */
HAL_Delay(PHY_CONFIG_DELAY);
}
#endif /* __ZEPHYR__ */

/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);
Expand Down