Skip to content

stm32 with external NOR ospi flash in MemoryMapped mode #61082

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 7 commits into from
Closed

stm32 with external NOR ospi flash in MemoryMapped mode #61082

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
4830c7c
drivers: flash: stm32 flash base address from the DTS node
FRASTM Jan 23, 2024
3291b4c
drivers: flash: stm32 flash driver has a Kconfig STM32_MEMMAP
FRASTM Aug 2, 2023
44a1934
drivers: flash: stm32 ospi drivers with Memorymapped mode
FRASTM Jun 1, 2023
aeed3d3
drivers: flash: stm32 ospi driver aborts memmap before erase/write
FRASTM Jan 24, 2024
5e10f8a
soc: arm: stm32u5 device with DCACHE for writing to NOR flash
FRASTM Sep 6, 2023
84aca6d
boards: arm: stm32u585 disco kit for XiP on external octoflash
FRASTM Aug 31, 2023
2d582f4
samples: subsys: fs_little fs on stm32u585 disco in xip
FRASTM Jan 23, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
11 changes: 6 additions & 5 deletions boards/arm/b_u585i_iot02a/b_u585i_iot02a-common.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -131,11 +131,10 @@ stm32_lp_tick_source: &lptim1 {

status = "okay";

mx25lm51245: ospi-nor-flash@0 {
mx25lm51245: ospi-nor-flash@70000000 {
compatible = "st,stm32-ospi-nor";
reg = <0>;
reg = <0x70000000 DT_SIZE_M(64)>; /* 512 Mbits */
ospi-max-frequency = <DT_FREQ_M(50)>;
size = <DT_SIZE_M(512)>; /* 64 MBytes */
spi-bus-width = <OSPI_OPI_MODE>;
data-rate = <OSPI_DTR_TRANSFER>;
four-byte-opcodes;
Expand All @@ -146,8 +145,10 @@ stm32_lp_tick_source: &lptim1 {
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
reg = <0x00000000 DT_SIZE_M(64)>;
/* put image at the offset of slot1 */
slot1_partition:partition@100000 {
label = "image-1";
reg = <0x00100000 DT_SIZE_K(416)>;
};
};
};
Expand Down
6 changes: 1 addition & 5 deletions boards/arm/b_u585i_iot02a/b_u585i_iot02a.dts
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,6 @@
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};

aliases {
Expand Down Expand Up @@ -45,10 +44,7 @@
label = "image-0";
reg = <0x00010000 DT_SIZE_K(416)>;
};
slot1_partition: partition@78000 {
label = "image-1";
reg = <0x00078000 DT_SIZE_K(416)>;
};

scratch_partition: partition@e0000 {
label = "image-scratch";
reg = <0x000e0000 DT_SIZE_K(64)>;
Expand Down
7 changes: 7 additions & 0 deletions drivers/flash/Kconfig.stm32
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -72,4 +72,11 @@ config FLASH_STM32_BLOCK_REGISTERS
registers improves system security, because flash content (or
protection settings) can't be changed even when exploit was found.

config STM32_MEMMAP
bool "NOR Flash in MemoryMapped for XiP"
depends on XIP
help
This option enables the XIP mode for the external NOR flash
mounted on STM32 boards.

endif # SOC_FLASH_STM32
7 changes: 4 additions & 3 deletions drivers/flash/flash_stm32.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -157,7 +157,7 @@ static void flash_stm32_flush_caches(const struct device *dev,
regs->ACR |= FLASH_ACR_DCEN;
}
#elif defined(CONFIG_SOC_SERIES_STM32F7X)
SCB_InvalidateDCache_by_Addr((uint32_t *)(CONFIG_FLASH_BASE_ADDRESS
SCB_InvalidateDCache_by_Addr((uint32_t *)(FLASH_STM32_BASE_ADDRESS
+ offset), len);
#endif
}
Expand All @@ -178,7 +178,7 @@ static int flash_stm32_read(const struct device *dev, off_t offset,

LOG_DBG("Read offset: %ld, len: %zu", (long int) offset, len);

memcpy(data, (uint8_t *) CONFIG_FLASH_BASE_ADDRESS + offset, len);
memcpy(data, (uint8_t *) FLASH_STM32_BASE_ADDRESS + offset, len);

return 0;
}
Expand Down Expand Up @@ -562,7 +562,8 @@ static int stm32_flash_init(const struct device *dev)

flash_stm32_sem_init(dev);

LOG_DBG("Flash initialized. BS: %zu",
LOG_DBG("Flash @0x%x initialized. BS: %zu",
FLASH_STM32_BASE_ADDRESS,
flash_stm32_parameters.write_block_size);

/* Check Flash configuration */
Expand Down
3 changes: 3 additions & 0 deletions drivers/flash/flash_stm32.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,9 @@
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#endif

/* Get the base address of the flash from the DTS node */
#define FLASH_STM32_BASE_ADDRESS DT_REG_ADDR(DT_INST(0, st_stm32_nv_flash))

struct flash_stm32_priv {
FLASH_TypeDef *regs;
#if DT_NODE_HAS_PROP(DT_INST(0, st_stm32_flash_controller), clocks) || \
Expand Down
Loading