-
Notifications
You must be signed in to change notification settings - Fork 219
[frontend] Implement SiLU fusion with mul + sigmoid pattern #544
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
base: main
Are you sure you want to change the base?
Conversation
linuxlonelyeagle
left a comment
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Please rewrite the title as [frontend] Implement SiLU fusion with mul + sigmoid pattern
| graph.op_groups = {} | ||
| graph.op_groups["subgraph0"] = new_op_group | ||
| graph.group_map_device = {"subgraph0": device} | ||
| graph.group_map_device = {"subgraph0": device} |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
add endline
tests/Python/test_silu.py
Outdated
| # CHECK: %{{.*}} = linalg.generic | ||
| # CHECK: return %{{.*}} | ||
| # CHECK: %{{.*}} = tensor.empty() : tensor<4x4xf32> | ||
| # CHECK: %{{.*}} = linalg.generic {indexing_maps = [#map, #map], iterator_types = ["parallel", "parallel"]} ins(%arg0 : tensor<4x4xf32>) outs(%0 : tensor<4x4xf32>) { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
In my view, this is a completely useless check. You should also capture the SSA value.
|
Keep the PR description concise—ideally under 50 characters. You should explain what you did and why you did it. This description will appear in the git log. |
be8fe8b to
7522589
Compare
|
@linuxlonelyeagle Hi, thanks a lot for your suggestions! Title: I'll update it to "[frontend] Implement SiLU fusion with mul + sigmoid pattern" for clarity and log consistency. Newline: I'll add the missing newline at the end of the file. Test check: I’ll revise the test in tests/Python/test_silu.py to also capture the SSA value as you suggested. PR description: I'll shorten the description to under 50 characters and make sure it succinctly states “what” was done and “why”. |
tests/Python/test_silu.py
Outdated
| # CHECK: %{{.*}} = linalg.generic | ||
| # CHECK: return %{{.*}} | ||
| # CHECK: %{{.*}} = tensor.empty() : tensor<4x4xf32> | ||
| # CHECK: %[[RES:.*]] = linalg.generic {indexing_maps = [#map, #map], iterator_types = ["parallel", "parallel"]} ins(%arg0 : tensor<4x4xf32>) outs(%0 : tensor<4x4xf32>) { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
# CHECK-LABEL: func @forward
# CHECK: %{{.*}} = tensor.empty() : tensor<4x4xf32>
# CHECK: %[[RES:.*]] = linalg.generic {indexing_maps = [#map, #map], iterator_types = ["parallel", "parallel"]} ins(%arg0 : tensor<4x4xf32>) outs(%0 : tensor<4x4xf32>) {
....
# CHECK: return %[[RES]] : tensor<4x4xf32>
# CHECK: }There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The above is an example I provided.
- Eliminate unnecessary content from checks.
- Ensure the format of the check is sufficiently elegant.
- I believe you should also capture the SSA values within the generic op block.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
is this ok?
# CHECK-LABEL: func.func @forward
# CHECK: %[[EMPTY:.*]] = tensor.empty() : tensor<4x4xf32>
# CHECK: %[[RES:.*]] = linalg.generic {.*} ins(%arg0 : tensor<4x4xf32>) outs(%[[EMPTY]] : tensor<4x4xf32>) {
# CHECK: ^bb0(%in: f32, %out: f32):
# CHECK: %[[NEG:.*]] = arith.negf %in : f32
# CHECK: %[[EXP:.*]] = math.exp %[[NEG]] : f32
# CHECK: %[[ONE:.*]] = arith.constant 1.000000e+00 : f32
# CHECK: %[[ADD:.*]] = arith.addf %[[EXP]], %[[ONE]] : f32
# CHECK: %[[DIV:.*]] = arith.divf %in, %[[ADD]] : f32
# CHECK: linalg.yield %[[DIV]] : f32
# CHECK: } -> tensor<4x4xf32>
# CHECK: return %[[RES]] : tensor<4x4xf32>There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Take a close look at the example I provided: the colons in CHECK-LABEL and CHECK are aligned.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
OK, thank you for pointing that out! Is this version ok? If so, I'll update my PR accordingly:
# CHECK-LABEL: func.func @forward
# CHECK: %[[EMPTY:.*]] = tensor.empty() : tensor<4x4xf32>
# CHECK: %[[RES:.*]] = linalg.generic {.*} ins(%arg0 : tensor<4x4xf32>) outs(%[[EMPTY]] : tensor<4x4xf32>) {
# CHECK: ^bb0(%in: f32, %out: f32):
# CHECK: %[[NEG:.*]] = arith.negf %in : f32
# CHECK: %[[EXP:.*]] = math.exp %[[NEG]] : f32
# CHECK: %[[ONE:.*]] = arith.constant 1.000000e+00 : f32
# CHECK: %[[ADD:.*]] = arith.addf %[[EXP]], %[[ONE]] : f32
# CHECK: %[[DIV:.*]] = arith.divf %in, %[[ADD]] : f32
# CHECK: linalg.yield %[[DIV]] : f32
# CHECK: } -> tensor<4x4xf32>
# CHECK: return %[[RES]] : tensor<4x4xf32>There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This is good.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
ok,I have update my PR accordingly.
8c0970d to
561bcc3
Compare
|
@GuoningHuang, please check the CI error. |
561bcc3 to
f2caa21
Compare
|
@zhanghb97 CI error has been fixed. Thanks for pointing it out! |
55e43c3 to
c1336ec
Compare
Fuse tosa.mul + tosa.sigmoid into a linalg-based SiLU op to enable efficient IR lowering and further backend optimization.