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2 changes: 1 addition & 1 deletion include/circt/Dialect/Seq/SeqOps.td
Original file line number Diff line number Diff line change
Expand Up @@ -766,4 +766,4 @@ def FromImmutableOp : SeqOp<"from_immutable", [Pure]> {
let results = (outs AnyType:$output);

let assemblyFormat = "$input attr-dict `:` functional-type(operands, results)";
}
}
32 changes: 31 additions & 1 deletion lib/Dialect/Seq/SeqOps.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -301,6 +301,36 @@ LogicalResult FIFOOp::verify() {

return success();
}
//===----------------------------------------------------------------------===//
// CompRegOp Printer
//===----------------------------------------------------------------------===//
//test
//ensures proper quoting (@"foo/bar") when
// special characters are present.
static ParseResult parseOptionalInnerSym(OpAsmParser &parser,
hw::InnerSymAttr &innerSym) {
// If "sym" keyword is absent, treat as not present.
if (failed(parser.parseOptionalKeyword("sym"))) {
innerSym = hw::InnerSymAttr();
return success();
}

// Reuse the same parser path from FirRegOp.
if (parser.parseCustomAttributeWithFallback(
innerSym, /*type=*/nullptr, "inner_sym", /*attr list*/std::nullopt))
return failure();

return success();
}

static void printOptionalInnerSym(OpAsmPrinter &p, Operation *op,
hw::InnerSymAttr innerSym) {
if (!innerSym)
return;
p << " sym ";
innerSym.print(p);
}


//===----------------------------------------------------------------------===//
// CompRegOp
Expand Down Expand Up @@ -1285,4 +1315,4 @@ FailureOr<seq::InitialOp> circt::seq::mergeInitialOps(Block *block) {

// Provide the autogenerated implementation guts for the Op classes.
#define GET_OP_CLASSES
#include "circt/Dialect/Seq/Seq.cpp.inc"
#include "circt/Dialect/Seq/Seq.cpp.inc"
14 changes: 14 additions & 0 deletions test/Dialect/Seq/roundtrip-compreg-inner-sym.mlir
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
// RUN: circt-opt --verify-roundtrip %s | FileCheck %s

hw.module @Foo(in %a: i42, in %clk: !seq.clock) {
// CHECK: seq.compreg sym @"foo/bar" %a, %clk : i42
%0 = seq.compreg sym @"foo/bar" %a, %clk : i42
hw.output
}

hw.module @Bar(in %d: i32, in %clk: !seq.clock, in %en: i1) {
// CHECK: seq.compreg.ce sym @"weird name" %d, %clk, %en : i32
%1 = seq.compreg.ce sym @"weird name" %d, %clk, %en : i32
hw.output
}

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