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AMDGPU: Move fpenvIEEEMode into TTI #141945

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28 changes: 3 additions & 25 deletions llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const APFloat &Src1,
return maxnum(Src0, Src1);
}

enum class KnownIEEEMode { Unknown, On, Off };

/// Return KnownIEEEMode::On if we know if the use context can assume
/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
/// "amdgpu-ieee"="false".
static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
const GCNSubtarget &ST) {
if (!ST.hasIEEEMode()) // Only mode on gfx12
return KnownIEEEMode::On;

const Function *F = I.getFunction();
if (!F)
return KnownIEEEMode::Unknown;

Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
if (IEEEAttr.isValid())
return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;

return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
: KnownIEEEMode::On;
}

// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
Expand Down Expand Up @@ -1003,7 +981,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa<UndefValue>(Src0)) {
switch (fpenvIEEEMode(II, *ST)) {
switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
Expand All @@ -1018,7 +996,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa<UndefValue>(Src1)) {
switch (fpenvIEEEMode(II, *ST)) {
switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
Expand All @@ -1034,7 +1012,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa<UndefValue>(Src2)) {
switch (fpenvIEEEMode(II, *ST)) {
switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(), ConstSrc2->makeQuiet());
Expand Down
17 changes: 17 additions & 0 deletions llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}

GCNTTIImpl::KnownIEEEMode
GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
if (!ST->hasIEEEMode()) // Only mode on gfx12
return KnownIEEEMode::On;

const Function *F = I.getFunction();
if (!F)
return KnownIEEEMode::Unknown;

Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
if (IEEEAttr.isValid())
return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;

return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
: KnownIEEEMode::On;
}
7 changes: 7 additions & 0 deletions llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -281,6 +281,13 @@ class GCNTTIImpl final : public BasicTTIImplBase<GCNTTIImpl> {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const override;

enum class KnownIEEEMode { Unknown, On, Off };

/// Return KnownIEEEMode::On if we know if the use context can assume
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Suggested change
/// Return KnownIEEEMode::On if we know if the use context can assume
/// \returns KnownIEEEMode::On if we know if the use context can assume

/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
/// "amdgpu-ieee"="false".
KnownIEEEMode fpenvIEEEMode(const Instruction &I) const;
};

} // end namespace llvm
Expand Down
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