Adding infrastructure for RoCC interface attached to Spike processor. Memory interface to follow.

[mihai-c-tudor]

Related PRs / Issues:

Type of change:

• Bug fix
• New feature
• Other enhancement

Impact:

• RTL change
• Software change (RISC-V software)
• Build system change
• Other

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• Did you set main as the base branch?
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[jerryz123]

This overall looks pretty good.
One naming nit though, I think its better if we rename every variable/function that has accel in the name to rocc, so it more precisely conveys that this interfaces hardware RoCC accelerators to the SpikeTile.

[mihai-c-tudor]

Makes sense, changes implemented.