Legalize: implement soft-float legalizations

[mlugg]

See commit messages. (@alexrp, having implemented the requested legalization I now expect you to PR 7 backends /j)

[alexrp]

Should we take advantage of some of these in the LLVM backend for the situations where we currently do manual soft float lowering? IIRC this mainly affects f16 and f128 on some targets.

[mlugg]

No; it's strictly better in terms of both compiler performance and runtime performance to do the work in backends rather than Legalize, so ripping out that support would be counterproductive. Legalize is a tool for incomplete backends (currently technically all of them), not something they should be designed to rely on.

[alexrp]

both compiler performance and runtime performance

Wait, why would runtime performance be worse?

[mlugg]

Doing the translation in Legalize means doing it at the AIR level rather than the MIR level, so it's typical for it to ultimately result in more bloated MIR. For instance, when calling int<->float conversion functions, we might need to zero/sign-extend the integer to an ABI size before we do it; or when operating on c_longdouble we may need to bitcast the result back from f128; or when calling extended int routines (for >128 bits) we might need to make an alloc so we can pass a pointer to an integer. When combined, this can cause one conversion, say u150 -> c_longdouble (with 80-bit long double), to turn into AIR like this:

%1 = block(c_longdouble, {
  %2 = intcast(u256, [original operand])
  %3 = alloc(*u256)
  %4 = store(%3, %2)
  %5 = legalize_compiler_rt_call(__floatuneixf, [%3, <usize, 150>])
  %6 = bitcast(c_longdouble, %5)
  %7 = br(%1, %6)
})

That's a lot of operations, and a typical non-optimizing backend might lower them much less efficiently than it could lower the operation as a whole. For instance, the operand is quite likely to already be spilled to the stack and to be represented in memory as a zero-extended u256, so the intcast/alloc/store should all be nops, but a backend is pretty much guaranteed to at the very least reserve more stack space and shuffle memory around when lowering those AIR instructions. This applies less to the LLVM backend than to machine code backends, because we aren't dealing with register allocation / spills manually in the LLVM backend, but it's still definitely going to happen.

[mlugg]

Oh, for posterity, here's the patch I used to enable these legalizations in the x86_64 backend so as to test this PR:

commit e5d30c005ceaa792775a0e353a3a8398aed5c155
Author: Matthew Lugg <[email protected]>
Date:   Fri Nov 14 10:54:12 2025 +0000

    DO NOT MERGE; make x86_64 use soft float

diff --git a/src/codegen/x86_64/CodeGen.zig b/src/codegen/x86_64/CodeGen.zig
index b43b359de1..a391527037 100644
--- a/src/codegen/x86_64/CodeGen.zig
+++ b/src/codegen/x86_64/CodeGen.zig
@@ -73,6 +73,12 @@ pub fn legalizeFeatures(_: *const std.Target) *const Air.Legalize.Features {
         .expand_packed_store,
         .expand_packed_struct_field_val,
         .expand_packed_aggregate_init,
+
+        .soft_f16,
+        .soft_f32,
+        .soft_f64,
+        .soft_f80,
+        .soft_f128,
     });
 }
 
@@ -173690,8 +173696,40 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
                 for (ops) |op| try op.die(cg);
             },
 
-            // No soft-float `Legalize` features are enabled, so this instruction never appears.
-            .legalize_compiler_rt_call => unreachable,
+            .legalize_compiler_rt_call => {
+                const inst_data = air_datas[@intFromEnum(inst)].legalize_compiler_rt_call;
+                const extra = cg.air.extraData(Air.Call, inst_data.payload);
+                const args: []const Air.Inst.Ref = @ptrCast(cg.air.extra.items[extra.end..][0..extra.data.args_len]);
+
+                var sfba_state = std.heap.stackFallback(512, cg.gpa);
+                const sfba = sfba_state.get();
+
+                const arg_tys = try sfba.alloc(Type, args.len);
+                defer sfba.free(arg_tys);
+                const arg_tys_ip = try sfba.alloc(InternPool.Index, args.len);
+                defer sfba.free(arg_tys_ip);
+                const arg_vals = try sfba.alloc(MCValue, args.len);
+                defer sfba.free(arg_vals);
+
+                for (arg_tys, arg_tys_ip, arg_vals, args) |*ty, *ty_ip, *mcv, arg| {
+                    ty.* = cg.typeOf(arg);
+                    ty_ip.* = ty.*.toIntern();
+                    mcv.* = .{ .air_ref = arg };
+                }
+
+                assert(inst_data.func.@"callconv"(zcu.getTarget()).eql(cg.target.cCallingConvention().?));
+                const ret = try cg.genCall(.{ .extern_func = .{
+                    .return_type = inst_data.func.returnType().toIntern(),
+                    .param_types = arg_tys_ip,
+                    .sym = inst_data.func.name(cg.target),
+                } }, arg_tys, arg_vals, .{ .safety = true });
+
+                var bt = cg.liveness.iterateBigTomb(inst);
+                for (args) |arg| try cg.feed(&bt, arg);
+
+                const result = if (cg.liveness.isUnused(inst)) .unreach else ret;
+                cg.finishAirResult(inst, result);
+            },
 
             .work_item_id, .work_group_size, .work_group_id => unreachable,
         }