cse332
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North South University - Computer Organization and Architecture
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May 24, 2022
This is NSU CSE332 course's project that starts with learning about ISA, assembly language, advanced ALU, data path and control, pipelining in theory.
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May 2, 2025 - Verilog
20-bit CPU | CSE332 | NSU | North South University | Computer Architecture Project
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Dec 30, 2024 - Python
In CSE332L: Computer Organization and Architecture Lab, I completed an assignment involving several Verilog tasks, where I solved the problems using behavioral, dataflow, and gate-level modeling.
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Apr 26, 2026 - Verilog
I have built a R-type and I-type datapath for a 16-bit system in logisim, featuring 16 bit data, 4-bit addressing (16 registers) and 16-bit instructions, where the ALU is capable of performing 8 operations. More descriptions are written inside the file
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Apr 26, 2026
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